Huy Vo
|
7408c9ab69
|
removing wires
|
2012-05-24 10:42:39 -07:00 |
|
Henry Cook
|
87cbae2c8a
|
Removed defunct ioDmem
|
2012-05-07 17:31:39 -07:00 |
|
Henry Cook
|
622a801bb1
|
Refactored cpu/cache interface to use nested bundles
|
2012-05-02 11:54:28 -07:00 |
|
Andrew Waterman
|
c13d3e6f88
|
fix probe tag read-modify-write atomicity violation
|
2012-04-26 02:29:31 -07:00 |
|
Henry Cook
|
1ed89f1cab
|
Fixed abort bug: removed uneeded state, added mshr guard on xact_abort.valid and xact_init.ready on same cycle
|
2012-04-24 17:17:42 -07:00 |
|
Henry Cook
|
a39080d0b1
|
Fixed abort bug: xact_abort.ready was not pinned high
|
2012-04-24 17:16:40 -07:00 |
|
Andrew Waterman
|
fb4408b150
|
fix AMO replay/coherence deadlock
|
2012-04-15 22:56:02 -07:00 |
|
Andrew Waterman
|
724735f13f
|
fix writeback bug
|
2012-04-13 03:16:48 -07:00 |
|
Andrew Waterman
|
00d934cfac
|
fix coherence bugs in cache
|
2012-04-12 21:57:37 -07:00 |
|
Andrew Waterman
|
c0ec3794bf
|
coherence mostly works now
|
2012-04-10 02:22:45 -07:00 |
|
Henry Cook
|
3cdd166153
|
Refactored coherence as member rather than trait. MI and MEI protocols.
|
2012-04-10 00:09:58 -07:00 |
|
Henry Cook
|
0b4937f70f
|
changed coherence message type names
|
2012-04-09 23:29:31 -07:00 |
|
Henry Cook
|
ed79ec98f7
|
Refactored coherence better from uncore hub, better coherence function names
|
2012-04-09 23:29:31 -07:00 |
|
Yunsup Lee
|
1cddd5de56
|
fix amo locking up problem
|
2012-03-20 02:16:28 -07:00 |
|
Yunsup Lee
|
264732556f
|
fixes to match verilog X semantics
|
2012-03-19 03:10:00 -07:00 |
|
Andrew Waterman
|
cfca2d1411
|
clean up cache interfaces; avoid reserved keywords
|
2012-03-16 00:44:16 -07:00 |
|
Andrew Waterman
|
820884c7e6
|
fix probes for smaller cache sizes
address bits (pgidx_bits-1,taglsb) were omitted from tag checks.
|
2012-03-15 23:08:30 -07:00 |
|
Andrew Waterman
|
4684171ac6
|
fix fence.i for associative caches
|
2012-03-15 21:23:21 -07:00 |
|
Andrew Waterman
|
7dde7099d2
|
use broadcast hub and coherent HTIF
|
2012-03-14 16:44:35 -07:00 |
|
Andrew Waterman
|
1492457df5
|
add probe replies to HTIF
|
2012-03-13 16:56:47 -07:00 |
|
Andrew Waterman
|
b0f798962c
|
add probe unit
|
2012-03-13 16:43:51 -07:00 |
|
Henry Cook
|
287bc1c262
|
Further refinement of tag_match/tag_hit signals
|
2012-03-13 11:48:12 -07:00 |
|
Andrew Waterman
|
d76b05bde1
|
fix way selection on D$ write upgrades
|
2012-03-13 02:21:02 -07:00 |
|
Henry Cook
|
6229a33dc4
|
fixed cache controller flush unit deadlock
|
2012-03-12 22:01:52 -07:00 |
|
Andrew Waterman
|
8ffdac9526
|
fix D$ store-upgrade bug
loads to the same address as stores that cause an upgrade
could return the old value
|
2012-03-10 15:50:10 -08:00 |
|
Andrew Waterman
|
e3a68848e0
|
fix D$ critical paths and fix verilog build
|
2012-03-09 20:02:51 -08:00 |
|
Henry Cook
|
e591d83e91
|
Fixed global_xact_id propagation bug
|
2012-03-09 11:05:44 -08:00 |
|
Andrew Waterman
|
766bac88f8
|
refactor D$ writebacks and flushes
MSHRs now arbitrate for writebacks and handle flushes.
|
2012-03-09 02:55:46 -08:00 |
|
Andrew Waterman
|
5a7c5772a8
|
clearly distinguish PPN and cache tag
|
2012-03-07 23:11:17 -08:00 |
|
Andrew Waterman
|
c09eeb7fd2
|
fix D$ next-state logic
it was using the CPU command from the wrong pipeline stage,
which was a don't-care with ThreeStateIncoherence.
|
2012-03-07 01:42:08 -08:00 |
|
Andrew Waterman
|
a0c9452b86
|
change D$ to use FourStateCoherence protocol
instead of ThreeStateIncoherence.
|
2012-03-07 01:26:35 -08:00 |
|
Andrew Waterman
|
6e16b04ada
|
implement transaction finish messages
|
2012-03-06 15:48:08 -08:00 |
|
Andrew Waterman
|
5f33ab24b0
|
fix merge conflict
oops :(
|
2012-03-06 02:02:53 -08:00 |
|
Andrew Waterman
|
5f12990dfb
|
support memory transaction aborts
|
2012-03-06 00:35:02 -08:00 |
|
Henry Cook
|
1b3307df32
|
Removed has_data fields from all coherence messages, increased message type names to compensate
|
2012-03-02 23:51:53 -08:00 |
|
Henry Cook
|
35f97bf858
|
Filled out 4 state coherence functions for cache
|
2012-03-02 21:58:50 -08:00 |
|
Yunsup Lee
|
8678b3d70c
|
clean up ioDecoupled/ioPipe interface
|
2012-03-01 20:48:46 -08:00 |
|
Andrew Waterman
|
6d03d75835
|
improve D$ internal interfaces
|
2012-03-01 20:20:15 -08:00 |
|
Andrew Waterman
|
28cacd953f
|
D$ cleanup - merge ReplayUnit and MSHRFile
|
2012-03-01 19:30:56 -08:00 |
|
Andrew Waterman
|
52101373e0
|
clean up D$ store data unit
|
2012-03-01 19:20:00 -08:00 |
|
Andrew Waterman
|
c38065d0e8
|
clean up priority encoders
|
2012-02-29 16:13:14 -08:00 |
|
Andrew Waterman
|
012da6002e
|
replace tile memory interface with ioTileLink
work in progress towards coherent HTIF. for now, requests
are incoherently passed through a null coherence hub.
|
2012-02-29 03:10:47 -08:00 |
|
Andrew Waterman
|
c99f6bbeb7
|
separate memory request command and data
also, merge some VLSI/C++ test harness functionality
|
2012-02-28 19:06:23 -08:00 |
|
Andrew Waterman
|
2b1c07c723
|
replace ioDCache with ioMem
|
2012-02-27 18:36:09 -08:00 |
|
Yunsup Lee
|
bfd0ae125e
|
upgrade to new rocket/vu memory interface, fix amo nack bug in hellacache
|
2012-02-26 23:46:51 -08:00 |
|
Andrew Waterman
|
6e706c7c74
|
fix yet another AMO-related replay bug
|
2012-02-26 20:20:45 -08:00 |
|
Huy Vo
|
5b0f7ccf68
|
updating rocket code to lastest version of chisel, passes assembly tests in C++ and Verilog as long as you dont use the vector unit
|
2012-02-26 17:24:08 -08:00 |
|
Yunsup Lee
|
94ba32bbd3
|
change package name and sbt project name to rocket
|
2012-02-25 17:09:26 -08:00 |
|
Andrew Waterman
|
7b3cce79e3
|
allocate a primary miss on a prefetch
|
2012-02-23 22:40:24 -08:00 |
|
Andrew Waterman
|
3eebf40310
|
nack CPU requests during any replay
|
2012-02-22 18:37:13 -08:00 |
|