 Henry Cook
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4d007d5c40
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changed val names in hub to match new tilelink names
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2013-03-20 17:14:07 -07:00 |
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Henry Cook
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273bd34091
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Generalized mem arbiter, moved to uncore. Support for multiple banks when acking grants.
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2013-03-20 15:53:36 -07:00 |
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Henry Cook
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c36b1dfa30
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Cleaned up uncore and coherence interface. Removed defunct broadcast hub. Trait-ified tilelink bundle components. Added generalized mem arbiter.
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2013-03-20 15:52:39 -07:00 |
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Henry Cook
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319b4544d7
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nTiles -> nClients in LogicalNetworkConfig
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2013-03-20 14:30:16 -07:00 |
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Henry Cook
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a7ae7e5758
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Cleaned up self-probes
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2013-03-20 14:28:20 -07:00 |
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Henry Cook
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6d2541aced
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nTiles -> nClients in LogicalNetworkConfig
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2013-03-20 14:12:36 -07:00 |
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 Andrew Waterman
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7b019cb0da
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rmeove aborts
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2013-03-19 15:30:23 -07:00 |
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Andrew Waterman
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ea9d0b771e
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remove aborts; simplify probes
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2013-03-19 15:29:40 -07:00 |
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 Yunsup Lee
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bc140ce9bc
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add vec_{vvadd,cmplxmult,matmul} bmarks
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2013-03-19 00:43:51 -07:00 |
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Yunsup Lee
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9efe71412f
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add DRAMSideLLCNull
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2013-03-19 00:43:34 -07:00 |
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Yunsup Lee
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0f50970913
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move HellaQueue to uncore
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2013-03-19 00:43:20 -07:00 |
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Yunsup Lee
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f120800aa2
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add DRAMSideLLCNull
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2013-03-19 00:41:28 -07:00 |
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Yunsup Lee
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717a78f964
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fix seqRead inference
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2013-03-19 00:41:09 -07:00 |
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Henry Cook
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9f0ccbeac5
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writebacks on release network pass asm tests and bmarks
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2013-02-28 18:13:41 -08:00 |
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Henry Cook
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e0361840bd
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writebacks on release network pass asm tests and bmarks
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2013-02-28 18:11:40 -08:00 |
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 Andrew Waterman
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944f56a766
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remove duplicate definitions
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2013-02-28 14:55:19 -08:00 |
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Andrew Waterman
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c6695bee7c
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fix emulator HTIF interface bug
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2013-02-20 16:11:21 -08:00 |
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Andrew Waterman
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fc26150933
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update to new Mem style
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2013-02-20 16:10:47 -08:00 |
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Andrew Waterman
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35349d227f
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update to new Mem style
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2013-02-20 16:09:46 -08:00 |
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 Eric Love
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17b8654042
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Merge branch 'master' of github.com:ucb-bar/reference-chip
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2013-02-12 12:47:03 -06:00 |
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Yunsup Lee
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61b18a6722
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push rocket,hwacha,uncore
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2013-02-09 01:05:51 -08:00 |
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Andrew Waterman
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9f89c812b7
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fix HTIF memory size reporting
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2013-01-29 23:08:25 -08:00 |
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Yunsup Lee
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a0bd0adeb2
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change write/read port ordering for vlsi_mem_gen script
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2013-01-29 21:32:42 -08:00 |
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Andrew Waterman
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66eb3720a4
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fix SRAM semantics bug in HellaFlowQueue
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2013-01-29 21:16:42 -08:00 |
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Yunsup Lee
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60bd3a6413
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Revert "shuffled FPU control logic around to make functional unit retiming work better"
This reverts commit 20dd308067b143adff4913fc7ac710a393ca1d86.
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2013-01-29 19:34:55 -08:00 |
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Andrew Waterman
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6275e009f8
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fix HellaQueue deq.valid signal
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2013-01-28 20:57:43 -08:00 |
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Andrew Waterman
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45d8066f45
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add HellaQueue, an SRAM-based queue
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2013-01-28 20:54:25 -08:00 |
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Andrew Waterman
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37c67f1d87
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pipeline reset to the vector unit
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2013-01-28 17:56:32 -08:00 |
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 Rimas Avizienis
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f2df6147df
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shuffled FPU control logic around to make functional unit retiming work better
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2013-01-28 17:17:09 -08:00 |
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Henry Cook
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f5729c9f25
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removed ack_required field from grant messages
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2013-01-28 16:44:17 -08:00 |
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Henry Cook
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47a632cc59
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added support for voluntary wbs over the release network
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2013-01-28 16:39:45 -08:00 |
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Henry Cook
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8cbd316b5e
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Merge branch 'ready-sig-fix' into pin-cleanup
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2013-01-27 23:04:58 -08:00 |
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Henry Cook
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931cffa749
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ready signal fix
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2013-01-27 23:04:35 -08:00 |
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Henry Cook
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83c207c852
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pin cleanup in htif
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2013-01-27 12:00:28 -08:00 |
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Henry Cook
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1134bbf1a4
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cleanup disconnected io pins (overwritten network headers)
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2013-01-27 11:59:17 -08:00 |
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Henry Cook
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409b549d3c
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actually cleared up tile ios
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2013-01-27 11:27:09 -08:00 |
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Henry Cook
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696dd102eb
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cleans up unconnected tile io pins (networking headers overwritten at top level)
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2013-01-27 10:59:41 -08:00 |
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Andrew Waterman
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dbb61306f0
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randomize coreid mapping
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2013-01-26 16:13:14 -08:00 |
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Andrew Waterman
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4077b22929
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include fesvr as a library; improve harnesses
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2013-01-24 23:57:23 -08:00 |
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Andrew Waterman
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c890099e09
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add System Control Register space to HTIF
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2013-01-24 23:41:24 -08:00 |
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Andrew Waterman
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1945fa898b
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make external clock divider programmable
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2013-01-24 23:40:47 -08:00 |
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Andrew Waterman
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575bd3445a
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re-generalize scoreboard
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2013-01-24 18:00:39 -08:00 |
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Andrew Waterman
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1fbc20450e
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don't allow simultaneous reads and writes to the tag ram
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2013-01-24 17:55:00 -08:00 |
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Andrew Waterman
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37ee843b2c
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don't use reset combinationally
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2013-01-24 17:55:00 -08:00 |
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Andrew Waterman
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bb6fbddf1f
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don't probe the mshr file to inquire about refills
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2013-01-24 17:54:59 -08:00 |
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Andrew Waterman
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5b9f938263
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correctly sign-extend badvaddr, epc, and ebase
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2013-01-24 17:54:59 -08:00 |
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Rimas Avizienis
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63060bc0a8
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minor tweaks for eos18 tapeout (SRAM r/w port ordering, etc)
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2013-01-23 19:27:53 -08:00 |
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Yunsup Lee
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f37b9d9a7d
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fix dramsim2 memory model to wrap around
- there was a problem when the I$ speculatively fetched an instruction from an illegal address
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2013-01-23 01:40:15 -08:00 |
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Yunsup Lee
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217898c7d0
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emulator depends on source files in src directory
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2013-01-23 01:39:47 -08:00 |
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Yunsup Lee
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516a64f576
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commit vec=true
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2013-01-22 20:24:33 -08:00 |
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