writebacks on release network pass asm tests and bmarks
This commit is contained in:
Henry Cook
parent
47a632cc59
commit
9f0ccbeac5
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@ -28,20 +28,21 @@ abstract class CoherencePolicy {
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def getAcquireTypeOnPrimaryMiss(cmd: Bits, state: UFix): UFix
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def getAcquireTypeOnSecondaryMiss(cmd: Bits, state: UFix, outstanding: Acquire): UFix
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def getAcquireTypeOnCacheControl(cmd: Bits): Bits
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def getAcquireTypeOnWriteback(): Bits
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def getReleaseTypeOnCacheControl(cmd: Bits): Bits
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def getReleaseTypeOnVoluntaryWriteback(): Bits
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def getVoluntaryWriteback(addr: UFix, client_id: UFix, master_id: UFix): Release
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def newRelease (incoming: Probe, state: UFix): Release
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def newRelease (incoming: Probe, state: UFix, id: UFix): Release
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def messageHasData (reply: Release): Bool
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def messageHasData (rel: Release): Bool
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def messageHasData (acq: Acquire): Bool
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def messageHasData (reply: Grant): Bool
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def messageHasData (grant: Grant): Bool
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def messageUpdatesDataArray (reply: Grant): Bool
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def messageIsUncached(acq: Acquire): Bool
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def isCoherenceConflict(addr1: Bits, addr2: Bits): Bool
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def isVoluntary(rel: Release): Bool
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def isVoluntary(gnt: Grant): Bool
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def getGrantType(a_type: UFix, count: UFix): Bits
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def getGrantType(rel: Release, count: UFix): Bits
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def getProbeType(a_type: UFix, global_state: UFix): UFix
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@ -50,6 +51,9 @@ abstract class CoherencePolicy {
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def needsAckReply(a_type: UFix, global_state: UFix): Bool
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def requiresAck(grant: Grant): Bool
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def requiresAck(release: Release): Bool
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def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool
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def uFixListContains(list: List[UFix], elem: UFix): Bool = list.map(elem === _).reduceLeft(_||_)
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}
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trait UncachedTransactions {
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@ -66,13 +70,8 @@ abstract class CoherencePolicyWithUncached extends CoherencePolicy with Uncached
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abstract class IncoherentPolicy extends CoherencePolicy {
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// UNIMPLEMENTED
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def newStateOnProbe(incoming: Probe, state: UFix): Bits = state
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def newRelease (incoming: Probe, state: UFix): Release = {
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val reply = new Release
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reply.r_type := UFix(0)
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reply.master_xact_id := UFix(0)
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reply
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}
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def messageHasData (reply: Release) = Bool(false)
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def newRelease (incoming: Probe, state: UFix, id: UFix): Release = Release( UFix(0), UFix(0), UFix(0), UFix(0))
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def messageHasData (rel: Release) = Bool(false)
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def isCoherenceConflict(addr1: Bits, addr2: Bits): Bool = Bool(false)
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def getGrantType(a_type: UFix, count: UFix): Bits = Bits(0)
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def getGrantType(rel: Release, count: UFix): Bits = Bits(0)
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@ -82,15 +81,19 @@ abstract class IncoherentPolicy extends CoherencePolicy {
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def needsAckReply(a_type: UFix, global_state: UFix): Bool = Bool(false)
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def requiresAck(grant: Grant) = Bool(true)
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def requiresAck(release: Release) = Bool(false)
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def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = Bool(false)
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}
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class ThreeStateIncoherence extends IncoherentPolicy {
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val tileInvalid :: tileClean :: tileDirty :: Nil = Enum(3){ UFix() }
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val acquireReadClean :: acquireReadDirty :: acquireWriteback :: Nil = Enum(3){ UFix() }
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val grantData :: grantAck :: Nil = Enum(2){ UFix() }
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val grantVoluntaryAck :: grantData :: grantAck :: Nil = Enum(3){ UFix() }
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val releaseVoluntaryInvalidateData :: releaseInvalidateAck :: Nil = Enum(2){ UFix() }
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val uncachedTypeList = List()
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val hasDataTypeList = List(acquireWriteback)
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val uncachedAcquireTypeList = List()
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val hasDataAcquireTypeList = List(acquireWriteback)
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val hasDataReleaseTypeList = List(acquireWriteback)
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val hasDataGrantTypeList = List(grantData)
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def isHit ( cmd: Bits, state: UFix): Bool = (state === tileClean || state === tileDirty)
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def isValid (state: UFix): Bool = state != tileInvalid
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@ -116,6 +119,7 @@ class ThreeStateIncoherence extends IncoherentPolicy {
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def getVoluntaryWriteback(addr: UFix, client_id: UFix, master_id: UFix) = Release(releaseVoluntaryInvalidateData, addr, client_id, master_id)
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def isVoluntary(rel: Release) = rel.r_type === releaseVoluntaryInvalidateData
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def isVoluntary(gnt: Grant) = gnt.g_type === grantVoluntaryAck
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def getAcquireTypeOnPrimaryMiss(cmd: Bits, state: UFix): UFix = {
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val (read, write) = cpuCmdToRW(cmd)
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@ -125,13 +129,13 @@ class ThreeStateIncoherence extends IncoherentPolicy {
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val (read, write) = cpuCmdToRW(cmd)
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Mux(write, acquireReadDirty, outstanding.a_type)
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}
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def getAcquireTypeOnCacheControl(cmd: Bits): Bits = acquireWriteback //TODO
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def getAcquireTypeOnWriteback(): Bits = acquireWriteback
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def getReleaseTypeOnCacheControl(cmd: Bits): Bits = releaseVoluntaryInvalidateData // TODO
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def getReleaseTypeOnVoluntaryWriteback(): Bits = releaseVoluntaryInvalidateData
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def messageHasData (init: Acquire): Bool = hasDataTypeList.map(t => init.a_type === t).reduceLeft(_||_)
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def messageHasData (reply: Grant) = (reply.g_type === grantData)
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def messageHasData (acq: Acquire): Bool = uFixListContains(hasDataAcquireTypeList, acq.a_type)
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def messageHasData (grant: Grant): Bool = uFixListContains(hasDataGrantTypeList, grant.g_type)
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def messageUpdatesDataArray (reply: Grant) = (reply.g_type === grantData)
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def messageIsUncached(init: Acquire): Bool = uncachedTypeList.map(t => init.a_type === t).reduceLeft(_||_)
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def messageIsUncached(acq: Acquire): Bool = uFixListContains(uncachedAcquireTypeList, acq.a_type)
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}
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class MICoherence extends CoherencePolicyWithUncached {
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@ -143,8 +147,10 @@ class MICoherence extends CoherencePolicyWithUncached {
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val grantVoluntaryAck :: grantReadExclusive :: grantReadUncached :: grantWriteUncached :: grantReadWordUncached :: grantWriteWordUncached :: grantAtomicUncached :: Nil = Enum(7){ UFix() }
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val probeInvalidate :: probeCopy :: Nil = Enum(2){ UFix() }
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val releaseVoluntaryInvalidateData :: releaseInvalidateData :: releaseCopyData :: releaseInvalidateAck :: releaseCopyAck :: Nil = Enum(5){ UFix() }
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val uncachedTypeList = List(acquireReadUncached, acquireWriteUncached, grantReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val uncachedAcquireTypeList = List(acquireReadUncached, acquireWriteUncached, acquireReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataAcquireTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataReleaseTypeList = List(releaseVoluntaryInvalidateData, releaseInvalidateData, releaseCopyData)
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val hasDataGrantTypeList = List(grantReadExclusive, grantReadUncached, grantReadWordUncached, grantAtomicUncached)
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def isHit (cmd: Bits, state: UFix): Bool = state != tileInvalid
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def isValid (state: UFix): Bool = state != tileInvalid
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@ -194,14 +200,14 @@ class MICoherence extends CoherencePolicyWithUncached {
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def getVoluntaryWriteback(addr: UFix, client_id: UFix, master_id: UFix) = Release(releaseVoluntaryInvalidateData, addr, client_id, master_id)
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def isUncachedReadTransaction(acq: Acquire) = acq.a_type === acquireReadUncached
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def isVoluntary(rel: Release) = rel.r_type === releaseVoluntaryInvalidateData
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def isVoluntary(gnt: Grant) = gnt.g_type === grantVoluntaryAck
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def getAcquireTypeOnPrimaryMiss(cmd: Bits, state: UFix): UFix = acquireReadExclusive
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def getAcquireTypeOnSecondaryMiss(cmd: Bits, state: UFix, outstanding: Acquire): UFix = acquireReadExclusive
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def getAcquireTypeOnCacheControl(cmd: Bits): Bits = acquireWriteUncached
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def getAcquireTypeOnWriteback(): Bits = getAcquireTypeOnCacheControl(M_INV)
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def getReleaseTypeOnCacheControl(cmd: Bits): Bits = releaseVoluntaryInvalidateData // TODO
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def getReleaseTypeOnVoluntaryWriteback(): Bits = getReleaseTypeOnCacheControl(M_INV)
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def newRelease (incoming: Probe, state: UFix): Release = {
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val reply = new Release
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def newRelease (incoming: Probe, state: UFix, id: UFix): Release = {
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val with_data = MuxLookup(incoming.p_type, releaseInvalidateData, Array(
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probeInvalidate -> releaseInvalidateData,
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probeCopy -> releaseCopyData
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@ -210,23 +216,16 @@ class MICoherence extends CoherencePolicyWithUncached {
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probeInvalidate -> releaseInvalidateAck,
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probeCopy -> releaseCopyAck
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))
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reply.r_type := Mux(needsWriteback(state), with_data, without_data)
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reply.master_xact_id := incoming.master_xact_id
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reply
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Release( Mux(needsWriteback(state), with_data, without_data), incoming.addr, id, incoming.master_xact_id)
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}
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def messageHasData (reply: Release): Bool = {
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(reply.r_type === releaseInvalidateData ||
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reply.r_type === releaseCopyData)
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}
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def messageHasData (acq: Acquire): Bool = hasDataTypeList.map(t => acq.a_type === t).reduceLeft(_||_)
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def messageHasData (reply: Grant): Bool = {
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(reply.g_type != grantWriteUncached && reply.g_type != grantWriteWordUncached)
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}
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def messageHasData (rel: Release): Bool = uFixListContains(hasDataReleaseTypeList, rel.r_type)
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def messageHasData (acq: Acquire): Bool = uFixListContains(hasDataAcquireTypeList, acq.a_type)
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def messageHasData (grant: Grant): Bool = uFixListContains(hasDataGrantTypeList, grant.g_type)
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def messageUpdatesDataArray (reply: Grant): Bool = {
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(reply.g_type === grantReadExclusive)
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}
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def messageIsUncached(acq: Acquire): Bool = uncachedTypeList.map(t => acq.a_type === t).reduceLeft(_||_)
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def messageIsUncached(acq: Acquire): Bool = uFixListContains(uncachedAcquireTypeList, acq.a_type)
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def isCoherenceConflict(addr1: Bits, addr2: Bits): Bool = (addr1 === addr2)
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@ -269,6 +268,7 @@ class MICoherence extends CoherencePolicyWithUncached {
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}
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def requiresAck(grant: Grant) = Bool(true)
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def requiresAck(release: Release) = Bool(false)
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def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData)
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}
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class MEICoherence extends CoherencePolicyWithUncached {
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@ -280,8 +280,11 @@ class MEICoherence extends CoherencePolicyWithUncached {
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val grantVoluntaryAck :: grantReadExclusive :: grantReadUncached :: grantWriteUncached :: grantReadExclusiveAck :: grantReadWordUncached :: grantWriteWordUncached :: grantAtomicUncached :: Nil = Enum(8){ UFix() }
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val probeInvalidate :: probeDowngrade :: probeCopy :: Nil = Enum(3){ UFix() }
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val releaseVoluntaryInvalidateData :: releaseInvalidateData :: releaseDowngradeData :: releaseCopyData :: releaseInvalidateAck :: releaseDowngradeAck :: releaseCopyAck :: Nil = Enum(7){ UFix() }
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val uncachedTypeList = List(acquireReadUncached, acquireWriteUncached, grantReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val uncachedAcquireTypeList = List(acquireReadUncached, acquireWriteUncached, acquireReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataAcquireTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataReleaseTypeList = List(releaseVoluntaryInvalidateData, releaseInvalidateData, releaseDowngradeData, releaseCopyData)
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val hasDataGrantTypeList = List(grantReadExclusive, grantReadUncached, grantReadWordUncached, grantAtomicUncached)
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def isHit (cmd: Bits, state: UFix): Bool = state != tileInvalid
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def isValid (state: UFix): Bool = state != tileInvalid
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@ -340,6 +343,7 @@ class MEICoherence extends CoherencePolicyWithUncached {
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def getVoluntaryWriteback(addr: UFix, client_id: UFix, master_id: UFix) = Release(releaseVoluntaryInvalidateData, addr, client_id, master_id)
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def isUncachedReadTransaction(acq: Acquire) = acq.a_type === acquireReadUncached
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def isVoluntary(rel: Release) = rel.r_type === releaseVoluntaryInvalidateData
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def isVoluntary(gnt: Grant) = gnt.g_type === grantVoluntaryAck
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def getAcquireTypeOnPrimaryMiss(cmd: Bits, state: UFix): UFix = {
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val (read, write) = cpuCmdToRW(cmd)
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@ -349,11 +353,10 @@ class MEICoherence extends CoherencePolicyWithUncached {
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val (read, write) = cpuCmdToRW(cmd)
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Mux(write, acquireReadExclusiveDirty, outstanding.a_type)
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}
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def getAcquireTypeOnCacheControl(cmd: Bits): Bits = acquireWriteUncached
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def getAcquireTypeOnWriteback(): Bits = getAcquireTypeOnCacheControl(M_INV)
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def getReleaseTypeOnCacheControl(cmd: Bits): Bits = releaseVoluntaryInvalidateData // TODO
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def getReleaseTypeOnVoluntaryWriteback(): Bits = getReleaseTypeOnCacheControl(M_INV)
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def newRelease (incoming: Probe, state: UFix): Release = {
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val reply = new Release
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def newRelease (incoming: Probe, state: UFix, id: UFix): Release = {
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val with_data = MuxLookup(incoming.p_type, releaseInvalidateData, Array(
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probeInvalidate -> releaseInvalidateData,
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probeDowngrade -> releaseDowngradeData,
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@ -364,24 +367,16 @@ class MEICoherence extends CoherencePolicyWithUncached {
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probeDowngrade -> releaseDowngradeAck,
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probeCopy -> releaseCopyAck
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))
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reply.r_type := Mux(needsWriteback(state), with_data, without_data)
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reply.master_xact_id := incoming.master_xact_id
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reply
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Release( Mux(needsWriteback(state), with_data, without_data), incoming.addr, id, incoming.master_xact_id)
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}
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def messageHasData (reply: Release): Bool = {
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(reply.r_type === releaseInvalidateData ||
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reply.r_type === releaseDowngradeData ||
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reply.r_type === releaseCopyData)
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}
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def messageHasData (acq: Acquire): Bool = hasDataTypeList.map(t => acq.a_type === t).reduceLeft(_||_)
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def messageHasData (reply: Grant): Bool = {
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(reply.g_type != grantWriteUncached && reply.g_type != grantReadExclusiveAck && reply.g_type != grantWriteWordUncached)
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}
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def messageHasData (rel: Release): Bool = uFixListContains(hasDataReleaseTypeList, rel.r_type)
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def messageHasData (acq: Acquire): Bool = uFixListContains(hasDataAcquireTypeList, acq.a_type)
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def messageHasData (grant: Grant): Bool = uFixListContains(hasDataGrantTypeList, grant.g_type)
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def messageUpdatesDataArray (reply: Grant): Bool = {
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(reply.g_type === grantReadExclusive)
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}
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def messageIsUncached(init: Acquire): Bool = uncachedTypeList.map(t => init.a_type === t).reduceLeft(_||_)
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def messageIsUncached(acq: Acquire): Bool = uFixListContains(uncachedAcquireTypeList, acq.a_type)
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def isCoherenceConflict(addr1: Bits, addr2: Bits): Bool = (addr1 === addr2)
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@ -426,6 +421,8 @@ class MEICoherence extends CoherencePolicyWithUncached {
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}
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def requiresAck(grant: Grant) = Bool(true)
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def requiresAck(release: Release) = Bool(false)
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def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData)
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}
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class MSICoherence extends CoherencePolicyWithUncached {
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@ -437,8 +434,10 @@ class MSICoherence extends CoherencePolicyWithUncached {
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val grantVoluntaryAck :: grantReadShared :: grantReadExclusive :: grantReadUncached :: grantWriteUncached :: grantReadExclusiveAck :: grantReadWordUncached :: grantWriteWordUncached :: grantAtomicUncached :: Nil = Enum(9){ UFix() }
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val probeInvalidate :: probeDowngrade :: probeCopy :: Nil = Enum(3){ UFix() }
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val releaseVoluntaryInvalidateData :: releaseInvalidateData :: releaseDowngradeData :: releaseCopyData :: releaseInvalidateAck :: releaseDowngradeAck :: releaseCopyAck :: Nil = Enum(7){ UFix() }
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val uncachedTypeList = List(acquireReadUncached, acquireWriteUncached, grantReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val uncachedAcquireTypeList = List(acquireReadUncached, acquireWriteUncached, acquireReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataAcquireTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
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val hasDataReleaseTypeList = List(releaseVoluntaryInvalidateData, releaseInvalidateData, releaseDowngradeData, releaseCopyData)
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val hasDataGrantTypeList = List(grantReadShared, grantReadExclusive, grantReadUncached, grantReadWordUncached, grantAtomicUncached)
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def isHit (cmd: Bits, state: UFix): Bool = {
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val (read, write) = cpuCmdToRW(cmd)
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@ -504,6 +503,7 @@ class MSICoherence extends CoherencePolicyWithUncached {
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def getVoluntaryWriteback(addr: UFix, client_id: UFix, master_id: UFix) = Release(releaseVoluntaryInvalidateData, addr, client_id, master_id)
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def isUncachedReadTransaction(acq: Acquire) = acq.a_type === acquireReadUncached
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def isVoluntary(rel: Release) = rel.r_type === releaseVoluntaryInvalidateData
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def isVoluntary(gnt: Grant) = gnt.g_type === grantVoluntaryAck
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def getAcquireTypeOnPrimaryMiss(cmd: Bits, state: UFix): UFix = {
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val (read, write) = cpuCmdToRW(cmd)
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@ -513,11 +513,10 @@ class MSICoherence extends CoherencePolicyWithUncached {
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val (read, write) = cpuCmdToRW(cmd)
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Mux(write, acquireReadExclusive, outstanding.a_type)
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}
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def getAcquireTypeOnCacheControl(cmd: Bits): Bits = acquireWriteUncached
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def getAcquireTypeOnWriteback(): Bits = getAcquireTypeOnCacheControl(M_INV)
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def getReleaseTypeOnCacheControl(cmd: Bits): Bits = releaseVoluntaryInvalidateData // TODO
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def getReleaseTypeOnVoluntaryWriteback(): Bits = getReleaseTypeOnCacheControl(M_INV)
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def newRelease (incoming: Probe, state: UFix): Release = {
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val reply = new Release
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def newRelease (incoming: Probe, state: UFix, id: UFix): Release = {
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val with_data = MuxLookup(incoming.p_type, releaseInvalidateData, Array(
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probeInvalidate -> releaseInvalidateData,
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probeDowngrade -> releaseDowngradeData,
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@ -528,24 +527,16 @@ class MSICoherence extends CoherencePolicyWithUncached {
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probeDowngrade -> releaseDowngradeAck,
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probeCopy -> releaseCopyAck
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))
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reply.r_type := Mux(needsWriteback(state), with_data, without_data)
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reply.master_xact_id := incoming.master_xact_id
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reply
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Release( Mux(needsWriteback(state), with_data, without_data), incoming.addr, id, incoming.master_xact_id)
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}
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def messageHasData (reply: Release): Bool = {
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(reply.r_type === releaseInvalidateData ||
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reply.r_type === releaseDowngradeData ||
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reply.r_type === releaseCopyData)
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}
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def messageHasData (acq: Acquire): Bool = hasDataTypeList.map(t => acq.a_type === t).reduceLeft(_||_)
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def messageHasData (reply: Grant): Bool = {
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(reply.g_type != grantWriteUncached && reply.g_type != grantReadExclusiveAck && reply.g_type != grantWriteWordUncached)
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}
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def messageHasData (rel: Release): Bool = uFixListContains(hasDataReleaseTypeList, rel.r_type)
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def messageHasData (acq: Acquire): Bool = uFixListContains(hasDataAcquireTypeList, acq.a_type)
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def messageHasData (grant: Grant): Bool = uFixListContains(hasDataGrantTypeList, grant.g_type)
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def messageUpdatesDataArray (reply: Grant): Bool = {
|
||||
(reply.g_type === grantReadShared || reply.g_type === grantReadExclusive)
|
||||
}
|
||||
def messageIsUncached(acq: Acquire): Bool = uncachedTypeList.map(t => acq.a_type === t).reduceLeft(_||_)
|
||||
def messageIsUncached(acq: Acquire): Bool = uFixListContains(uncachedAcquireTypeList, acq.a_type)
|
||||
|
||||
def isCoherenceConflict(addr1: Bits, addr2: Bits): Bool = (addr1 === addr2)
|
||||
|
||||
|
|
@ -587,6 +578,8 @@ class MSICoherence extends CoherencePolicyWithUncached {
|
|||
}
|
||||
def requiresAck(grant: Grant) = Bool(true)
|
||||
def requiresAck(release: Release) = Bool(false)
|
||||
|
||||
def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData)
|
||||
}
|
||||
|
||||
class MESICoherence extends CoherencePolicyWithUncached {
|
||||
|
|
@ -598,8 +591,11 @@ class MESICoherence extends CoherencePolicyWithUncached {
|
|||
val grantVoluntaryAck :: grantReadShared :: grantReadExclusive :: grantReadUncached :: grantWriteUncached :: grantReadExclusiveAck :: grantReadWordUncached :: grantWriteWordUncached :: grantAtomicUncached :: Nil = Enum(9){ UFix() }
|
||||
val probeInvalidate :: probeDowngrade :: probeCopy :: Nil = Enum(3){ UFix() }
|
||||
val releaseVoluntaryInvalidateData :: releaseInvalidateData :: releaseDowngradeData :: releaseCopyData :: releaseInvalidateAck :: releaseDowngradeAck :: releaseCopyAck :: Nil = Enum(7){ UFix() }
|
||||
val uncachedTypeList = List(acquireReadUncached, acquireWriteUncached, acquireReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
val hasDataTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
|
||||
val uncachedAcquireTypeList = List(acquireReadUncached, acquireWriteUncached, acquireReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
val hasDataAcquireTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
val hasDataReleaseTypeList = List(releaseVoluntaryInvalidateData, releaseInvalidateData, releaseDowngradeData, releaseCopyData)
|
||||
val hasDataGrantTypeList = List(grantReadShared, grantReadExclusive, grantReadUncached, grantReadWordUncached, grantAtomicUncached)
|
||||
|
||||
def isHit (cmd: Bits, state: UFix): Bool = {
|
||||
val (read, write) = cpuCmdToRW(cmd)
|
||||
|
|
@ -665,6 +661,7 @@ class MESICoherence extends CoherencePolicyWithUncached {
|
|||
def getVoluntaryWriteback(addr: UFix, client_id: UFix, master_id: UFix) = Release(releaseVoluntaryInvalidateData, addr, client_id, master_id)
|
||||
def isUncachedReadTransaction(acq: Acquire) = acq.a_type === acquireReadUncached
|
||||
def isVoluntary(rel: Release) = rel.r_type === releaseVoluntaryInvalidateData
|
||||
def isVoluntary(gnt: Grant) = gnt.g_type === grantVoluntaryAck
|
||||
|
||||
def getAcquireTypeOnPrimaryMiss(cmd: Bits, state: UFix): UFix = {
|
||||
val (read, write) = cpuCmdToRW(cmd)
|
||||
|
|
@ -674,11 +671,10 @@ class MESICoherence extends CoherencePolicyWithUncached {
|
|||
val (read, write) = cpuCmdToRW(cmd)
|
||||
Mux(write, acquireReadExclusive, outstanding.a_type)
|
||||
}
|
||||
def getAcquireTypeOnCacheControl(cmd: Bits): Bits = acquireWriteUncached
|
||||
def getAcquireTypeOnWriteback(): Bits = getAcquireTypeOnCacheControl(M_INV)
|
||||
def getReleaseTypeOnCacheControl(cmd: Bits): Bits = releaseVoluntaryInvalidateData // TODO
|
||||
def getReleaseTypeOnVoluntaryWriteback(): Bits = getReleaseTypeOnCacheControl(M_INV)
|
||||
|
||||
def newRelease (incoming: Probe, state: UFix): Release = {
|
||||
val reply = new Release
|
||||
def newRelease (incoming: Probe, state: UFix, id: UFix): Release = {
|
||||
val with_data = MuxLookup(incoming.p_type, releaseInvalidateData, Array(
|
||||
probeInvalidate -> releaseInvalidateData,
|
||||
probeDowngrade -> releaseDowngradeData,
|
||||
|
|
@ -689,24 +685,16 @@ class MESICoherence extends CoherencePolicyWithUncached {
|
|||
probeDowngrade -> releaseDowngradeAck,
|
||||
probeCopy -> releaseCopyAck
|
||||
))
|
||||
reply.r_type := Mux(needsWriteback(state), with_data, without_data)
|
||||
reply.master_xact_id := incoming.master_xact_id
|
||||
reply
|
||||
Release( Mux(needsWriteback(state), with_data, without_data), incoming.addr, id, incoming.master_xact_id)
|
||||
}
|
||||
|
||||
def messageHasData (reply: Release): Bool = {
|
||||
(reply.r_type === releaseInvalidateData ||
|
||||
reply.r_type === releaseDowngradeData ||
|
||||
reply.r_type === releaseCopyData)
|
||||
}
|
||||
def messageHasData (acq: Acquire): Bool = hasDataTypeList.map(t => acq.a_type === t).reduceLeft(_||_)
|
||||
def messageHasData (reply: Grant): Bool = {
|
||||
(reply.g_type != grantWriteUncached && reply.g_type != grantReadExclusiveAck && reply.g_type != grantWriteWordUncached)
|
||||
}
|
||||
def messageHasData (rel: Release): Bool = uFixListContains(hasDataReleaseTypeList, rel.r_type)
|
||||
def messageHasData (acq: Acquire): Bool = uFixListContains(hasDataAcquireTypeList, acq.a_type)
|
||||
def messageHasData (grant: Grant): Bool = uFixListContains(hasDataGrantTypeList, grant.g_type)
|
||||
def messageUpdatesDataArray (reply: Grant): Bool = {
|
||||
(reply.g_type === grantReadShared || reply.g_type === grantReadExclusive)
|
||||
}
|
||||
def messageIsUncached(acq: Acquire): Bool = uncachedTypeList.map(t => acq.a_type === t).reduceLeft(_||_)
|
||||
def messageIsUncached(acq: Acquire): Bool = uFixListContains(uncachedAcquireTypeList, acq.a_type)
|
||||
|
||||
def isCoherenceConflict(addr1: Bits, addr2: Bits): Bool = (addr1 === addr2)
|
||||
|
||||
|
|
@ -752,6 +740,8 @@ class MESICoherence extends CoherencePolicyWithUncached {
|
|||
|
||||
def requiresAck(grant: Grant) = Bool(true)
|
||||
def requiresAck(release: Release) = Bool(false)
|
||||
|
||||
def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData)
|
||||
}
|
||||
|
||||
class MigratoryCoherence extends CoherencePolicyWithUncached {
|
||||
|
|
@ -762,10 +752,11 @@ class MigratoryCoherence extends CoherencePolicyWithUncached {
|
|||
val grantVoluntaryAck :: grantReadShared :: grantReadExclusive :: grantReadUncached :: grantWriteUncached :: grantReadExclusiveAck :: grantReadWordUncached :: grantWriteWordUncached :: grantAtomicUncached :: grantReadMigratory :: Nil = Enum(10){ UFix() }
|
||||
val probeInvalidate :: probeDowngrade :: probeCopy :: probeInvalidateOthers :: Nil = Enum(4){ UFix() }
|
||||
val releaseVoluntaryInvalidateData :: releaseInvalidateData :: releaseDowngradeData :: releaseCopyData :: releaseInvalidateAck :: releaseDowngradeAck :: releaseCopyAck :: releaseDowngradeDataMigratory :: releaseDowngradeAckHasCopy :: releaseInvalidateDataMigratory :: releaseInvalidateAckMigratory :: Nil = Enum(11){ UFix() }
|
||||
val uncachedTypeList = List(acquireReadUncached, acquireWriteUncached, acquireReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
val hasDataTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
|
||||
def uFixListContains(list: List[UFix], elem: UFix): Bool = list.map(elem === _).reduceLeft(_||_)
|
||||
val uncachedAcquireTypeList = List(acquireReadUncached, acquireWriteUncached, acquireReadWordUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
val hasDataAcquireTypeList = List(acquireWriteUncached, acquireWriteWordUncached, acquireAtomicUncached)
|
||||
val hasDataGrantTypeList = List(grantReadShared, grantReadExclusive, grantReadUncached, grantReadMigratory, grantReadWordUncached, grantAtomicUncached)
|
||||
val hasDataReleaseTypeList = List(releaseVoluntaryInvalidateData, releaseInvalidateData, releaseDowngradeData, releaseCopyData, releaseInvalidateDataMigratory, releaseDowngradeDataMigratory)
|
||||
|
||||
def isHit (cmd: Bits, state: UFix): Bool = {
|
||||
val (read, write) = cpuCmdToRW(cmd)
|
||||
|
|
@ -844,6 +835,7 @@ class MigratoryCoherence extends CoherencePolicyWithUncached {
|
|||
def getVoluntaryWriteback(addr: UFix, client_id: UFix, master_id: UFix) = Release(releaseVoluntaryInvalidateData, addr, client_id, master_id)
|
||||
def isUncachedReadTransaction(acq: Acquire) = acq.a_type === acquireReadUncached
|
||||
def isVoluntary(rel: Release) = rel.r_type === releaseVoluntaryInvalidateData
|
||||
def isVoluntary(gnt: Grant) = gnt.g_type === grantVoluntaryAck
|
||||
|
||||
def getAcquireTypeOnPrimaryMiss(cmd: Bits, state: UFix): UFix = {
|
||||
val (read, write) = cpuCmdToRW(cmd)
|
||||
|
|
@ -853,12 +845,11 @@ class MigratoryCoherence extends CoherencePolicyWithUncached {
|
|||
val (read, write) = cpuCmdToRW(cmd)
|
||||
Mux(write, Mux(state === tileInvalid, acquireReadExclusive, acquireInvalidateOthers), outstanding.a_type)
|
||||
}
|
||||
def getAcquireTypeOnCacheControl(cmd: Bits): Bits = acquireWriteUncached
|
||||
def getAcquireTypeOnWriteback(): Bits = getAcquireTypeOnCacheControl(M_INV)
|
||||
def getReleaseTypeOnCacheControl(cmd: Bits): Bits = releaseVoluntaryInvalidateData // TODO
|
||||
def getReleaseTypeOnVoluntaryWriteback(): Bits = getReleaseTypeOnCacheControl(M_INV)
|
||||
|
||||
def newRelease (incoming: Probe, state: UFix): Release = {
|
||||
def newRelease (incoming: Probe, state: UFix, id: UFix): Release = {
|
||||
Assert( incoming.p_type === probeInvalidateOthers && needsWriteback(state), "Bad probe request type, should be impossible.")
|
||||
val reply = new Release()
|
||||
val with_data = MuxLookup(incoming.p_type, releaseInvalidateData, Array(
|
||||
probeInvalidate -> Mux(uFixListContains(List(tileExclusiveDirty, tileMigratoryDirty), state),
|
||||
releaseInvalidateDataMigratory, releaseInvalidateData),
|
||||
|
|
@ -871,22 +862,16 @@ class MigratoryCoherence extends CoherencePolicyWithUncached {
|
|||
probeDowngrade -> Mux(state != tileInvalid, releaseDowngradeAckHasCopy, releaseDowngradeAck),
|
||||
probeCopy -> releaseCopyAck
|
||||
))
|
||||
reply.r_type := Mux(needsWriteback(state), with_data, without_data)
|
||||
reply.master_xact_id := incoming.master_xact_id
|
||||
reply
|
||||
Release( Mux(needsWriteback(state), with_data, without_data), incoming.addr, id, incoming.master_xact_id)
|
||||
}
|
||||
|
||||
def messageHasData (reply: Release): Bool = {
|
||||
uFixListContains(List(releaseInvalidateData, releaseDowngradeData, releaseCopyData, releaseInvalidateDataMigratory, releaseDowngradeDataMigratory), reply.r_type)
|
||||
}
|
||||
def messageHasData (acq: Acquire): Bool = uFixListContains(hasDataTypeList, acq.a_type)
|
||||
def messageHasData (reply: Grant): Bool = {
|
||||
uFixListContains(List(grantReadShared, grantReadExclusive, grantReadUncached, grantReadMigratory, grantReadWordUncached, grantAtomicUncached), reply.g_type)
|
||||
}
|
||||
def messageHasData (acq: Acquire): Bool = uFixListContains(hasDataAcquireTypeList, acq.a_type)
|
||||
def messageHasData (rel: Release): Bool = uFixListContains(hasDataReleaseTypeList, rel.r_type)
|
||||
def messageHasData (grant: Grant): Bool = uFixListContains(hasDataGrantTypeList, grant.g_type)
|
||||
def messageUpdatesDataArray (reply: Grant): Bool = {
|
||||
uFixListContains(List(grantReadShared, grantReadExclusive, grantReadMigratory), reply.g_type)
|
||||
}
|
||||
def messageIsUncached(acq: Acquire): Bool = uFixListContains(uncachedTypeList, acq.a_type)
|
||||
def messageIsUncached(acq: Acquire): Bool = uFixListContains(uncachedAcquireTypeList, acq.a_type)
|
||||
|
||||
def isCoherenceConflict(addr1: Bits, addr2: Bits): Bool = (addr1 === addr2)
|
||||
|
||||
|
|
@ -933,4 +918,6 @@ class MigratoryCoherence extends CoherencePolicyWithUncached {
|
|||
}
|
||||
def requiresAck(grant: Grant) = Bool(true)
|
||||
def requiresAck(release: Release) = Bool(false)
|
||||
|
||||
def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData)
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user