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Commit Graph

2688 Commits

Author SHA1 Message Date
Andrew Waterman
52fc34a138 Chisel3: bulk connect is not commutative
We haven't decided if this is a FIRRTL limitation that we should relax,
or a backwards incompatibility we're forced to live with.  Should make
for lively debate.
2015-08-01 21:11:25 -07:00
Andrew Waterman
9c7a41e8d3 Chisel3: bulk connect is not commutative
We haven't decided if this is a FIRRTL limitation that we should relax,
or a backwards incompatibility we're forced to live with.  Should make
for lively debate.
2015-08-01 21:09:00 -07:00
Andrew Waterman
6fc807f069 Chisel3: Avoid subword assignment 2015-08-01 21:08:35 -07:00
Andrew Waterman
6c0e1e33ab Purge UInt := SInt assignments 2015-07-31 15:42:10 -07:00
Andrew Waterman
6d7cc37e87 Specify some uninferrable widths
It's really scary that Chisel2 passed this stuff.
2015-07-31 14:23:52 -07:00
Andrew Waterman
45cf64dbd7 Use UInt instead of Vec[Bool] 2015-07-31 04:59:45 -07:00
Andrew Waterman
6d574f8c1b Fix incompatible assignment 2015-07-31 00:59:34 -07:00
Andrew Waterman
377e17e811 Add Wire() wrap 2015-07-31 00:32:02 -07:00
Andrew Waterman
57930e8a26 Chisel3 compatibility potpourri 2015-07-30 23:53:02 -07:00
Andrew Waterman
0686bdbe28 Avoid cross-module references
You can't instantiate a Vec in one module and use it in another.
An idiosyncrasy of the Chisel2 implementation let this one slip by.
In this case, it's just a matter of using def instead of val.
2015-07-30 23:49:06 -07:00
Andrew Waterman
8f7b390353 UInt-> Bits; avoid mixed UInt/SInt code 2015-07-30 23:49:06 -07:00
Andrew Waterman
6c391e3b37 Use UInt(0), not UInt(width=0), for constant 0 2015-07-30 23:49:06 -07:00
Henry Cook
0c9a7817b6 Reduce outstanding mem accesses for FPGAConfig (to reduce MIFTagBits < 7) 2015-07-30 16:30:00 -07:00
Jim Lawson
db7258f887 Add junctions to the possible managed dependency list. 2015-07-30 15:11:23 -07:00
Jim Lawson
4c0f996808 Fix typo (juntion -> junctions). 2015-07-30 14:50:28 -07:00
Henry Cook
51c42083d0 Add new junctions repo as submodule (contains externally facing buses and peripherals).
Bump all submodules.
2015-07-29 18:15:45 -07:00
Henry Cook
ee531dc97e Add missing changes to emulator/Makefile 2015-07-29 18:15:21 -07:00
Henry Cook
d2a594fb57 new junctions repo has mem size constants 2015-07-29 18:05:54 -07:00
Henry Cook
c70b495f6d moved buses to junctions repo 2015-07-29 18:04:30 -07:00
Henry Cook
9d67ef4ee2 simplify .sbt files 2015-07-29 17:22:33 -07:00
Andrew Waterman
ce161b83e3 Chisel3 compatibility: avoid subword assignment 2015-07-29 15:03:13 -07:00
Andrew Waterman
c8c312e860 minor btb cleanup 2015-07-29 15:03:01 -07:00
Henry Cook
8b1ab23347 update README.md 2015-07-29 11:49:21 -07:00
Henry Cook
4daa20b5fe simplify .sbt files 2015-07-29 11:49:20 -07:00
Andrew Waterman
a2fdcdcaef Use Seq, not Iterable, when traversal order matters 2015-07-29 00:24:58 -07:00
Andrew Waterman
431dd2219b Another Bits -> BitPat 2015-07-28 20:13:56 -07:00
Andrew Waterman
a69c749249 Fix compilation with scala 2.11.6
We forgot to specify return types on overloaded methods, and a previous
version of the scala compiler failed to flag this as an error.
2015-07-28 16:24:45 -07:00
Andrew Waterman
049fc8dc24 Chisel3 compatibility: use BitPat for don't-cares
This one's hella ugly, but for the time being, idgaf.
2015-07-28 02:48:49 -07:00
Andrew Waterman
f8ec6d6393 Chisel3 compatibility: use BitPat for don't-cares
Also, call the UInt factory instead of the Bits one, for good measure.
2015-07-28 02:46:23 -07:00
Henry Cook
d21ffa4dba Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used 2015-07-28 00:24:07 -07:00
Yunsup Lee
efd6458a3d add zscale programs 2015-07-27 19:06:06 -07:00
Yunsup Lee
e571ebaf7f bump zscale 2015-07-27 17:23:38 -07:00
Andrew Waterman
f2dcc40e67 Chisel3 compatibility changes 2015-07-27 12:42:20 -07:00
Henry Cook
866396545d For vlsi, make Memdessert elaborate before Top so the generated Makefrag-tests doesn't get overwritten 2015-07-23 17:00:22 -07:00
Andrew Waterman
0e06c941df Chisel3 compatibility fixes 2015-07-23 14:58:46 -07:00
Yunsup Lee
caf89baeb7 update zscale 2015-07-23 13:59:45 -07:00
Andrew Waterman
ae73e3a997 Only instantiate div/sqrt unit if requested 2015-07-22 22:18:18 -07:00
Andrew Waterman
e9433ee01e Minor cleanup 2015-07-22 17:38:08 -07:00
Andrew Waterman
b4e4ceed3d Factor out some more hazard detection code 2015-07-22 15:52:13 -07:00
Andrew Waterman
bd785e7d19 Factor out common hazard detection code 2015-07-22 15:46:20 -07:00
Henry Cook
bd4ff35a4b Upgrade sbt to 0.13.8, simplify build.scala Tasks, generate tests from TestGenerator App, set addons with env variable ROCKETCHIP_ADDONS 2015-07-22 11:49:10 -07:00
Andrew Waterman
cc447c8110 Refactor pipeline RTL (merge ctrl + dpath into rocket) 2015-07-21 17:10:56 -07:00
Andrew Waterman
25e1412a33 Merge pull request #11 from ucb-bar/regression-fixes
Regression script fixes
2015-07-20 12:58:54 -07:00
Palmer Dabbelt
d6b29ca9cc Run regression with bash's "-ex" mode
This causes every command to be echo'd to stderr, and any failing
command will fail the whole script.  Without this the regression
script will always pass.
2015-07-20 12:21:19 -07:00
Palmer Dabbelt
9bbecffbb8 Have regression run "make" before "make run-asm-tests"
I'm seeing some odd behavior where "make run-asm-tests" actually does
nothing.  This works around the issue.
2015-07-20 12:20:32 -07:00
Yunsup Lee
a99b1e3a01 append config name to generated Makefrag filename 2015-07-17 12:34:49 -07:00
Yunsup Lee
777facf91e update tools 2015-07-17 12:33:19 -07:00
Yunsup Lee
e7802825c3 add Zscale testing 2015-07-17 12:02:02 -07:00
Andrew Waterman
ac6e73e317 Add Wire() wrap 2015-07-15 20:24:18 -07:00
Andrew Waterman
3c0475e08b Add Wire() wrap 2015-07-15 20:24:03 -07:00