Commit Graph
100 Commits
Author SHA1 Message Date
Yunsup Lee 1e772daeea no spaces in Makefrag 2015-11-05 16:42:05 -08:00
Yunsup LeeandHoward Mao 51116e0674 add 2 and 4 memory channel configs 2015-11-05 10:48:32 -08:00
Yunsup LeeandHoward Mao 0d245741bc add multichannel NASTI support in Verilog testbench 2015-11-05 10:48:32 -08:00
Yunsup Lee a175afae73 make ZscaleChip work with new parameters framework 2015-10-25 10:24:39 -07:00
Yunsup Lee efd6458a3d add zscale programs 2015-07-27 19:06:06 -07:00
Yunsup Lee e571ebaf7f bump zscale 2015-07-27 17:23:38 -07:00
Yunsup Lee caf89baeb7 update zscale 2015-07-23 13:59:45 -07:00
Yunsup Lee a99b1e3a01 append config name to generated Makefrag filename 2015-07-17 12:34:49 -07:00
Yunsup Lee 777facf91e update tools 2015-07-17 12:33:19 -07:00
Yunsup Lee e7802825c3 add Zscale testing 2015-07-17 12:02:02 -07:00
Yunsup Lee 4c7c3f5bb2 add test generate for ZscaleTop 2015-07-14 16:26:28 -07:00
Yunsup Lee d6df479870 move 'include /Makefrag' out of top-level Makefrag 2015-07-14 16:13:32 -07:00
Yunsup Lee 09e29e8fe0 add zscale
only supports generating Verilog, which plugs into the fpga-spartan6 repository, for now
2015-07-07 20:38:47 -07:00
Yunsup Lee e6a13cdeba New machine-mode timer facility
Mirroring Andrew's commit to reference-chip
2015-07-07 17:26:07 -07:00
Yunsup Lee 4f57985198 change organization to riscv 2015-02-17 14:43:11 -08:00
Yunsup Lee 170f1fecbc push chisel,rocket,riscv-tools 2014-10-21 12:32:58 -07:00
Yunsup Lee f15baeea49 fix markdown for webpage 2014-10-07 03:55:00 -07:00
Yunsup Lee 5ca7f08226 change rocket submodule 2014-10-07 03:19:48 -07:00
Yunsup Lee e1b8f69cb5 change submodule pointers to https 2014-10-07 03:16:20 -07:00
Yunsup Lee 447761b06c fix typo in README 2014-10-07 02:09:34 -07:00
Yunsup Lee 91f211f766 updates to README 2014-10-07 02:08:03 -07:00
Yunsup Lee 702ddabe26 add ExampleSmallConfig for README 2014-10-07 02:07:59 -07:00
Yunsup Lee ae9b78d9ef add what/how explanation to README 2014-10-07 02:07:39 -07:00
Yunsup Lee e25d420155 Improve ChiselConfig composability; bump chisel 2014-10-06 13:43:40 -07:00
Yunsup Lee 73eac94a65 Added "findBy" function to allow grouping parameters by location (e.g. L1D vs L1I), rather than grouping by field (e.g. NSets vs NWays) 2014-10-06 13:40:35 -07:00
Yunsup Lee 6c18cd9559 add new fpga-zynq as submodule 2014-09-30 09:32:02 -07:00
Yunsup Lee 7a28d2b47c forgot to move more hwacha stuff out in rocket-chip 2014-09-25 15:34:18 -07:00
Yunsup Lee 70b0f9fd4d error out for PCWM-L, port width mismatch 2014-09-25 06:50:50 -07:00
Yunsup Lee e2ed81dcd2 push chisel 2014-09-25 06:50:05 -07:00
Yunsup Lee 3b9624277a normalize rocket-chip to reference-chip 2014-09-25 06:45:09 -07:00
Yunsup Lee 6495d0e6f7 bump rocket,uncore 2014-09-17 11:26:12 -07:00
Yunsup Lee 041a362943 push chisel 2014-09-17 11:12:12 -07:00
Yunsup Lee 221007595b allow BACKEND/CONFIG be environment variables 2014-09-17 11:12:08 -07:00
Yunsup Lee ef2e96211c bump chisel/hardfloat/rocket/uncore 2014-09-12 18:10:00 -07:00
Yunsup Lee 09de2e2794 compute number of outstanding misses for DRAMSideLLCNull 2014-09-12 18:09:38 -07:00
Yunsup Lee e40a6fdd64 more tweaks to README 2014-09-12 10:22:00 -07:00
Yunsup Lee c57dea415c fix markdown 2014-09-12 10:18:14 -07:00
Yunsup Lee 1cfd9f5a0e add LICENSE 2014-09-12 10:15:04 -07:00
Yunsup Lee 2c33852c52 final touches 2014-09-12 00:19:29 -07:00
Yunsup Lee 275b72368b add CONFIG to the name of simulator executable 2014-09-11 22:11:58 -07:00
Yunsup Lee c98afa1fea turn off DRAMSideLLC 2014-09-11 22:10:25 -07:00
Yunsup Lee b5a64487eb turn off DRAMSideLLC 2014-09-11 22:07:44 -07:00
Yunsup Lee 9dfaf5459e bump hardfloat,riscv-tools 2014-09-11 03:08:21 -07:00
Yunsup Lee 5f8bd18fac Makefiles should be perfect 2014-09-11 02:53:46 -07:00
Yunsup Lee bb22ecc8b5 fix rocket interrupt issue
h/t Andrew
2014-09-11 02:52:05 -07:00
Yunsup Lee 086bb02c24 check RISCV envirnoment variable 2014-09-11 02:38:21 -07:00
Yunsup Lee 02c08a156f generate consts.vh from chisel source 2014-09-10 17:14:55 -07:00
Yunsup Lee cfecd8832d tease out reference-chip specific stuff 2014-09-09 20:49:28 -07:00
Yunsup Lee 6b6bdd2b83 decommission Slave top-level module for fpga build 2014-09-08 00:23:15 -07:00
Yunsup Lee ddfd3ce968 further generalize fpga/vlsi builds 2014-09-08 00:21:57 -07:00
Yunsup Lee 3175a40509 add berkeley-hardfloat as submodule 2014-09-08 00:18:49 -07:00
Yunsup Lee 1e5b2f658f remove existing hardfloat repository 2014-09-07 23:45:47 -07:00
Yunsup Lee 1cb2d1d7b7 initialize all SRAMs to avoid X propagation problem 2014-09-04 11:06:01 -07:00
Yunsup Lee 763c57931b fix problem introduced with verilog generation in vsim/fsim 2014-09-04 09:49:57 -07:00
Yunsup Lee 7734285507 forgot to comment out hwacha 2014-09-01 09:01:36 -07:00
Yunsup Lee 0d18e491c7 update gitignore 2014-09-01 08:59:59 -07:00
Yunsup Lee 882fecf43a update README 2014-08-31 20:57:16 -07:00
Yunsup Lee c03c09ec31 update for rocket-chip release 2014-08-31 20:26:55 -07:00
Yunsup Lee 2fefbdd453 fixes to physical design flow 2014-04-21 21:36:39 -07:00
Yunsup Lee e4c97e7a57 push tools/tests 2014-04-14 21:18:22 -07:00
Yunsup Lee 8d68ea9e0b Merge branch 'master' of github.com:ucb-bar/reference-chip 2014-03-20 01:46:30 -07:00
Yunsup Lee 7bbcf920be sync up master 2014-03-20 01:45:23 -07:00
Yunsup Lee d2c32b048a fix bug in htif_fini, need to use vc_handle! 2014-03-18 01:35:08 -07:00
Yunsup Lee e4b56b5d0e generate verilog for rekall 2014-03-15 15:31:04 -07:00
Yunsup Lee 6951333a08 push rocket 2014-03-04 23:43:00 -08:00
Yunsup Lee 23045ec379 add hwacha vfmsv instructions, keepcfg bug fix, turn off secondary fconv 2014-03-02 03:38:06 -08:00
Yunsup Lee 49f0e43ed1 push riscv-tools 2014-03-01 03:31:03 -08:00
Yunsup Lee e20d50436a committed in the wrong directory, meant to commit in the hwacha directory 2014-03-01 00:01:35 -08:00
Yunsup Lee 8c459df3b6 flush deck when xcpt occurs, fixes remaining p test bugs 2014-02-28 22:50:34 -08:00
Yunsup Lee 0c4442c172 push tests/tools 2014-02-27 20:28:19 -08:00
Yunsup Lee bcfcdefe88 update hwacha 2014-02-27 04:39:12 -08:00
Yunsup Lee 46714c0c60 more improvements to hwacha 2014-02-26 21:20:53 -08:00
Yunsup Lee a5625de3d5 support vector irq tests 2014-02-25 21:18:03 -08:00
Yunsup Lee 220076506c push hwacha; all vector p/v/pt tests work now 2014-02-25 03:51:15 -08:00
Yunsup Lee e5c2bd5e7b add extensions option to riscv-dis for better disassembly 2014-02-25 03:50:32 -08:00
Yunsup Lee 8acc9510c4 push hwacha,chisel 2014-02-24 01:43:55 -08:00
Yunsup Lee 22345dd073 push rocket,hwacha 2014-02-22 22:53:24 -08:00
Yunsup Lee 79486c5802 push tools,tests 2014-02-06 11:25:45 -08:00
Yunsup Lee e20de64b8c rocket sync up 2014-02-06 00:30:31 -08:00
Yunsup Lee ac8ff4b7e8 getting vector exceptions to work 2014-02-06 00:12:41 -08:00
Yunsup Lee 5128298e8a allow chisel to elaborate Modules outside of the ReferenceChip package 2014-02-05 03:29:23 -08:00
Yunsup Lee dbeadba2dc add vfmvv 2014-02-05 03:28:33 -08:00
Yunsup Lee 107aa0defa recode expander/bank/lfu 2014-02-05 03:28:22 -08:00
Yunsup Lee ce36d67f05 push tools/tests 2014-01-22 20:18:44 -08:00
Yunsup Lee 1c6f4e91f9 merge origin/master, and push hwacha 2013-11-21 15:02:40 -08:00
Yunsup Lee 9e6e5adeba push uncore 2013-11-21 14:55:57 -08:00
Yunsup Lee 951226f413 fix slli/slliw encoding bug 2013-11-21 14:46:31 -08:00
Yunsup Lee 25fdf9827f push tests 2013-11-21 14:45:59 -08:00
Yunsup Lee 5642194834 push hwacha to consistent state 2013-11-20 16:44:33 -08:00
Yunsup Lee 8304a47919 Merge branch 'hwacha' of github.com:ucb-bar/reference-chip into hwacha 2013-11-19 18:02:13 -08:00
Yunsup Lee c06299c963 push tests 2013-11-19 18:01:59 -08:00
Yunsup Lee bb64c90092 forgot to put htif into uncore package 2013-11-07 15:42:21 -08:00
Yunsup Lee 1d6d4b4e96 move htif to uncore 2013-11-07 13:19:19 -08:00
Yunsup Lee ad1d8f219e push riscv-tools 2013-11-05 21:10:49 -08:00
Yunsup Lee c810847761 hookup all memory ports 2013-11-05 17:12:25 -08:00
Yunsup Lee 04108270ff push riscv-tools 2013-10-29 22:54:00 -07:00
Yunsup Lee 2c47b4388a push rocket 2013-08-26 14:54:49 -07:00
Yunsup Lee 9003bc2614 push rocket 2013-08-24 22:42:57 -07:00
Yunsup Lee d0674af13f forgot to push riscv-rocket 2013-08-24 22:15:38 -07:00
Yunsup Lee ba9bbc27df apply same change to fpga top-level 2013-08-24 15:50:03 -07:00