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Commit Graph

206 Commits

Author SHA1 Message Date
Yunsup Lee
717a78f964 fix seqRead inference 2013-03-19 00:41:09 -07:00
Henry Cook
9f0ccbeac5 writebacks on release network pass asm tests and bmarks 2013-02-28 18:13:41 -08:00
Andrew Waterman
944f56a766 remove duplicate definitions 2013-02-28 14:55:19 -08:00
Henry Cook
47a632cc59 added support for voluntary wbs over the release network 2013-01-28 16:39:45 -08:00
Henry Cook
1134bbf1a4 cleanup disconnected io pins (overwritten network headers) 2013-01-27 11:59:17 -08:00
Andrew Waterman
1945fa898b make external clock divider programmable 2013-01-24 23:40:47 -08:00
Henry Cook
b5ccdab514 changed val names in hub to match new tilelink names 2013-01-22 20:09:21 -08:00
Henry Cook
c211d74e95 New TileLink names 2013-01-21 17:17:26 -08:00
Henry Cook
fb2644760f single-ported coherence master 2013-01-16 23:57:35 -08:00
Henry Cook
f7c0152409 Refactored packet headers/payloads 2013-01-15 15:52:47 -08:00
Henry Cook
418e3fdf50 Bugfix in crossbar ready sigs, added adapter for old hub, removed incoherent sig from tilelink 2013-01-07 13:57:48 -08:00
Henry Cook
400d48e3de Refactored uncore conf 2012-12-13 11:39:14 -08:00
Henry Cook
6d61baa6cd Initial version of phys/log network compiles 2012-12-12 11:08:50 -08:00
Henry Cook
f359518e52 wip: new network classes 2012-12-12 11:08:50 -08:00
Andrew Waterman
aae7a67781 fix llc refill/writeback bugs 2012-12-06 02:07:03 -08:00
Andrew Waterman
50e9d952e8 don't initiate llc refill until writeback drains 2012-12-04 06:57:53 -08:00
Andrew Waterman
8103676b37 reduce physical address space to 4GB 2012-11-26 20:54:56 -08:00
Andrew Waterman
56f9b9721d treat prefetches as read requests 2012-11-20 05:38:49 -08:00
Yunsup Lee
6bd4f93f8c pull out prefetch commands from isRead 2012-11-18 03:13:17 -08:00
Andrew Waterman
3e6dc35809 issue self-probes for uncached read transactions
this facilitates I$ coherence.  but it seems like a hack and perhaps
the mechanism should be rethought.
2012-11-16 02:37:56 -08:00
Henry Cook
0cd0f8a9db Initial version of migratory protocol 2012-10-23 18:01:53 -07:00
Andrew Waterman
2aecb0024f UncoreConfiguration now contains coherence policy 2012-10-18 16:57:28 -07:00
Andrew Waterman
ffda0e41a9 parameterize width of MemSerdes/MemDesser 2012-10-18 16:56:36 -07:00
Henry Cook
9df5cfa552 Factored out tilelink classes 2012-10-16 14:26:33 -07:00
Henry Cook
8509cda813 Refined traits for use with rocket asserts, added UncoreConfiguration to handle ntiles 2012-10-16 13:58:18 -07:00
Henry Cook
1418604bf0 new constants organization 2012-10-15 18:52:48 -07:00
Huy Vo
08ab076217 forgot to change package + using fromBits in memserdes instead of manual unpacking 2012-10-10 15:42:39 -07:00
Huy Vo
9610622ab0 moving memserdes + slowio into src 2012-10-10 12:41:11 -07:00
Huy Vo
35f213e735 Merge branch 'master' of ../rocket-clone 2012-10-10 12:39:48 -07:00
Andrew Waterman
3973aef938 handle structural hazard on LLC tags 2012-10-09 18:04:55 -07:00
Huy Vo
916c1019af fixed memdessert unpacking 2012-10-09 13:03:17 -07:00
Huy Vo
cf8f20584e factoring out uncore into separate uncore repo 2012-10-01 16:08:41 -07:00
Huy Vo
2413763f3d henry's uncore and rocket changes for new xact types 2012-10-01 16:05:37 -07:00
Henry Cook
da6ec486f1 uncore and rocket changes for new xact types 2012-10-01 10:47:36 -07:00
Huy Vo
fa8075570a move srcs into src dir, factoring out uncore consts into consts 2012-09-27 12:59:45 -07:00
Andrew Waterman
6546dc84e2 rename queue to Queue
fixes build with case-insensitive file system
2012-08-08 22:11:59 -07:00
Andrew Waterman
aa7fd1f40b rename queue to Queue
fixes build with case-insensitive file system
2012-08-08 22:11:59 -07:00
Andrew Waterman
17dc2075dd fix some LLC control bugs 2012-08-06 17:10:04 -07:00
Andrew Waterman
115c25c34b fix some LLC control bugs 2012-08-06 17:10:04 -07:00
Andrew Waterman
875f3622af fix deadlock in coherence hub 2012-08-03 19:00:03 -07:00
Andrew Waterman
962423d2d1 fix deadlock in coherence hub 2012-08-03 19:00:03 -07:00
Andrew Waterman
e346f21725 fix control bug in LLC
structural hazard on tag ram caused deadlock
2012-08-03 18:59:37 -07:00
Andrew Waterman
92b7504c9a fix control bug in LLC
structural hazard on tag ram caused deadlock
2012-08-03 18:59:37 -07:00
Andrew Waterman
7a75334bb9 pipeline LLC further 2012-07-31 17:45:14 -07:00
Andrew Waterman
7b9cfd0b90 pipeline LLC further 2012-07-31 17:45:14 -07:00
Andrew Waterman
8db233c9b7 further pipeline the LLC 2012-07-30 20:12:11 -07:00
Andrew Waterman
85dc34df80 further pipeline the LLC 2012-07-30 20:12:11 -07:00
Yunsup Lee
4d4e28c138 remove reset pin on llc 2012-07-28 21:14:51 -07:00
Yunsup Lee
914b6b622d remove reset pin on llc 2012-07-28 21:14:51 -07:00
Yunsup Lee
465f2efca7 add reset pin to llc 2012-07-27 18:44:39 -07:00
Yunsup Lee
0a2d284d24 add reset pin to llc 2012-07-27 18:44:39 -07:00
Andrew Waterman
1ae3091261 memory system bug fixes 2012-07-26 00:05:21 -07:00
Andrew Waterman
1405718ca8 memory system bug fixes 2012-07-26 00:05:21 -07:00
Yunsup Lee
7736405726 fix bug in coherence hub, respect xact_rep.ready 2012-07-23 20:56:55 -07:00
Yunsup Lee
d0e12c13f6 fix bug in coherence hub, respect xact_rep.ready 2012-07-23 20:56:55 -07:00
Andrew Waterman
df8aff0906 don't dequeue probe queue during reset 2012-07-22 21:05:52 -07:00
Andrew Waterman
c6ac836581 don't dequeue probe queue during reset 2012-07-22 21:05:52 -07:00
Andrew Waterman
d01e70c672 decouple all interfaces between tile and top
also, add an "incoherent" bit to tilelink to indicate no probes needed
2012-07-17 22:55:40 -07:00
Andrew Waterman
0258dfb23f decouple all interfaces between tile and top
also, add an "incoherent" bit to tilelink to indicate no probes needed
2012-07-17 22:55:40 -07:00
Huy Vo
a79747a062 INPUT/OUTPUT orderring swapped 2012-07-12 18:16:57 -07:00
Huy Vo
18bc14058b INPUT/OUTPUT orderring swapped 2012-07-12 18:16:57 -07:00
Andrew Waterman
62a3ea4113 fix some LLC bugs 2012-07-11 17:56:39 -07:00
Andrew Waterman
0aa33bf909 fix some LLC bugs 2012-07-11 17:56:39 -07:00
Andrew Waterman
1ebfeeca8a add L2$
It still has performance bugs but no correctness bugs AFAIK.
2012-07-10 05:23:29 -07:00
Andrew Waterman
66cf690261 add L2$
It still has performance bugs but no correctness bugs AFAIK.
2012-07-10 05:23:29 -07:00
Huy Vo
166b857055 ioDecoupled -> FIFOIO, ioPipe -> PipeIO 2012-06-06 18:22:56 -07:00
Huy Vo
0c6bade592 ioDecoupled -> FIFOIO, ioPipe -> PipeIO 2012-06-06 18:22:56 -07:00
Huy Vo
9b3161920f moving util out into Chisel standard library 2012-06-06 12:51:26 -07:00
Huy Vo
f2942f79f9 moving util out into Chisel standard library 2012-06-06 12:51:26 -07:00
Huy Vo
6f2f1ba21c removing wires 2012-05-24 10:42:39 -07:00
Huy Vo
0208e9f95e removing wires 2012-05-24 10:42:39 -07:00
Andrew Waterman
f804c57bb0 reduce HTIF clock divider for now 2012-05-03 04:21:11 -07:00
Henry Cook
99bc99f2ad Fixed abort bug: removed uneeded state, added mshr guard on xact_abort.valid and xact_init.ready on same cycle 2012-04-24 17:17:42 -07:00
Henry Cook
00155f4bc4 Fixed abort bug: removed uneeded state, added mshr guard on xact_abort.valid and xact_init.ready on same cycle 2012-04-24 17:17:42 -07:00
Henry Cook
d61e6ee080 Fixed coherence bug: probe counting for single tile 2012-04-24 17:17:13 -07:00
Henry Cook
37eb1a4ae6 Fixed coherence bug: probe counting for single tile 2012-04-24 17:17:13 -07:00
Henry Cook
4a6c7dbc26 Policy determined by constants. MSI policy added. 2012-04-11 17:56:59 -07:00
Andrew Waterman
98a5d682a5 coherence mostly works now 2012-04-10 02:22:45 -07:00
Andrew Waterman
2a7d2888a7 coherence mostly works now 2012-04-10 02:22:45 -07:00
Henry Cook
1920c97066 Refactored coherence as member rather than trait. MI and MEI protocols. 2012-04-10 00:09:58 -07:00
Henry Cook
b22d7f8192 Refactored coherence as member rather than trait. MI and MEI protocols. 2012-04-10 00:09:58 -07:00
Henry Cook
5acf1d9820 defined abstract coherence traits in base trait, added Incoherent trait, cleaned up incoherent policy 2012-04-09 23:29:32 -07:00
Henry Cook
e71e3ce38f defined abstract coherence traits in base trait, added Incoherent trait, cleaned up incoherent policy 2012-04-09 23:29:32 -07:00
Henry Cook
a68f5e016d changed coherence type width names to represent max sizes for all protocols 2012-04-09 23:29:32 -07:00
Henry Cook
17a5d26c1e changed coherence type width names to represent max sizes for all protocols 2012-04-09 23:29:32 -07:00
Henry Cook
f7307ee411 changed coherence message type names 2012-04-09 23:29:31 -07:00
Henry Cook
6bc47a55b4 changed coherence message type names 2012-04-09 23:29:31 -07:00
Henry Cook
d301336c33 Refactored coherence better from uncore hub, better coherence function names 2012-04-09 23:29:31 -07:00
Henry Cook
27e3346c14 Refactored coherence better from uncore hub, better coherence function names 2012-04-09 23:29:31 -07:00
Andrew Waterman
73d8d42515 fix coherence bug with multiple probe replies 2012-04-09 21:40:35 -07:00
Andrew Waterman
257747a3a1 no dessert tonight :( 2012-03-26 23:50:09 -07:00
Andrew Waterman
25fe46dc18 remove bug from dessert 2012-03-26 14:18:57 -07:00
Andrew Waterman
4e6302fedc add dessert 2012-03-25 23:03:20 -07:00
Andrew Waterman
5a00143035 loop host.in to host.out during reset 2012-03-25 21:45:10 -07:00
Andrew Waterman
a7ebea13fc add mem serdes unit 2012-03-25 17:03:58 -07:00
Yunsup Lee
5f69c5a764 fix bug in coherence hub, specifically in abort handling logic 2012-03-20 02:16:28 -07:00
Andrew Waterman
e38114e4b0 fix coherence bug
popping wrong store dependence queue
2012-03-16 01:24:07 -07:00
Andrew Waterman
3129040bda use divided clk for htif. UDPATE YOUR FESVR
by default, we now load programs via a backdoor, because otherwise
it takes too long to simulate.
2012-03-15 18:36:51 -07:00
Andrew Waterman
77c405ffa1 use broadcast hub and coherent HTIF 2012-03-14 16:44:35 -07:00
Andrew Waterman
53cd543d3f fix minor coherence bugs 2012-03-13 19:10:54 -07:00