riscv/rocket-chip
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treat prefetches as read requests

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Andrew Waterman 2012-11-20 05:38:49 -08:00
parent 6bd4f93f8c
commit 56f9b9721d
1 changed files with 1 additions and 1 deletions
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2
uncore/src/coherence.scala
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@ -4,7 +4,7 @@ import Chisel._
import Constants._
object cpuCmdToRW {
def apply(cmd: Bits): (Bool, Bool) = (isRead(cmd), isWrite(cmd))
def apply(cmd: Bits): (Bool, Bool) = (isRead(cmd) || isPrefetch(cmd), isWrite(cmd))
}
abstract class CoherencePolicy {