Wesley W. Terpstra
7328b55abd
tilelink2: first cut at parameterization
2016-09-05 20:58:37 -07:00
Howard Mao
7b20609d4d
reorganize moving non-submodule packages into src/main/scala
2016-08-19 13:45:23 -07:00
Andrew Waterman
fee5d2b1ea
Remove parameters for some things that aren't parameterizable
...
Heads up @colinschmidt and @ccelio. I'm removing these because
they are ISA constants and so are not truly parameters, so the
parameter place is not the place for them. Since BOOM and Hwacha
both depend on rocket, you should be able to obtain them by
instantiating/extending rocket.HasCoreParameters.
2016-08-19 12:04:13 -07:00
Howard Mao
33676e81f8
use isOneOf as much as possible
2016-08-19 09:56:06 -07:00
Howard Mao
7671811ac9
merge uncore.Util into uncore.util
2016-08-18 18:33:46 -07:00
Howard Mao
38e0967816
strip DMA and RoCC CSRs out of rocket and uncore ( #201 )
2016-08-15 23:08:55 -07:00
Howard Mao
571d579b86
get unit tests working again
2016-08-10 11:23:07 -07:00
Howard Mao
f95d319162
don't use secondary external address map; collapse submap instead
2016-08-09 22:29:38 -07:00
Howard Mao
405294167f
fix TL -> Nasti converter w id
2016-08-09 18:24:23 -07:00
Andrew Waterman
458520c8f6
Use a generic UInt for TileLink op sizes, rather than MT_xx enum
2016-08-09 15:24:51 -07:00
Howard Mao
0a85e92652
Allow additional internal MMIO devices to be created without changing BaseConfig
2016-08-04 11:04:52 -07:00
Andrew Waterman
791a27748b
Update firrtl and remove firrtl hack in plic
2016-08-02 15:19:48 -07:00
Howard Mao
b7723f1ff8
make unit tests local to the packages being tested
2016-08-01 17:02:00 -07:00
Andrew Waterman
fe670e5421
Stop using deprecated FileSystemUtilities to create files
2016-07-31 18:04:56 -07:00
Andrew Waterman
832e56d3c7
Fix toBits/toUInt/toSInt deprecation warnings
2016-07-31 17:13:52 -07:00
Howard Mao
f34b0b0447
make sure L2 tracker doesn't read data array again if data buffer already filled
2016-07-29 16:47:31 -07:00
Howard Mao
fbcc7317cf
make sure PseudoLRU is given power of 2 ways
2016-07-27 18:39:33 -07:00
Howard Mao
15d1aa9346
make sure TrackerAllocationIO addr_block has correct direction set
2016-07-27 16:47:22 -07:00
Howard Mao
82bbbf908d
Fix L2 Writeback deadlock issue
...
The deadlock condition occurs when the acquire tracker attempts to
request a writeback while the writeback unit is still busy and a
voluntary release for the block to be written back is coming in.
The voluntary release cannot be accepted because it conflicts with the
acquire tracker. The acquire tracker can't merge the voluntary release
because it is waiting to send the writeback. The writeback can't
progress because the release it is waiting on is behind the voluntary
release.
The solution to this is to break the atomicity guarantee between the
acquire tracker and the writeback unit. This allows the voluntary
release tracker to take the voluntary release before the writeback unit
accepts the conflicting request. This causes a potential race condition
for the metadata array. The solution to this is to have the writeback
unit re-read the metadata after accepting a request.
2016-07-26 12:31:08 -07:00
Wesley W. Terpstra
11ec5b2cf4
bram: don't deal with multibeat; rely on the fragmenter
2016-07-22 14:51:05 -07:00
Wesley W. Terpstra
a52d418439
fragmenter: support multi-beat get/put via fragmenting to single-beat operations
2016-07-22 14:48:22 -07:00
Howard Mao
9168f35971
clean up the requirements in StatelessBridge
...
* No need to check that release ID bits and acquire ID bits the same
* Check that inner and outer coherence policies match
2016-07-21 19:41:56 -07:00
Howard Mao
12067a3b8d
make sure outer probe and finish lines are disconnected
2016-07-21 15:15:44 -07:00
Howard Mao
c38dff0855
add some more warnings about the StatelessBridge
2016-07-21 15:07:10 -07:00
Megan Wachs
eb9e998c08
Add ManagerToClientStatelessBridge
2016-07-21 13:49:16 -07:00
Howard Mao
0a1cd64786
fix number of builtin Acquire types
2016-07-21 13:45:20 -07:00
Howard Mao
86e31be820
fix lockup from back to back releases with data
2016-07-21 12:06:58 -07:00
Wesley W. Terpstra
fa8317fec1
debug: add clock crossing primitives
2016-07-19 14:52:43 -07:00
Henry Cook
e406d1bd73
Make probeCopy have same behavior as probeDowngrade
2016-07-18 18:22:49 -07:00
Howard Mao
9eeb1112d4
fix Bufferless irel_vs_iacq_conflict signal
2016-07-18 17:38:20 -07:00
Howard Mao
e5cccc0526
don't update xact_vol_irel if not a voluntary irel
2016-07-18 17:05:23 -07:00
Howard Mao
84098db81f
add a TileLinkTestRAM
2016-07-15 11:03:26 -07:00
Howard Mao
b122a54c32
don't allow more outer IDs than inner IDs
2016-07-13 12:42:28 -07:00
Howard Mao
de1e25f3d1
reduce usage of CAMs in converters
2016-07-13 11:20:50 -07:00
Howard Mao
8aa73915a1
put locking arbiter back into converter
2016-07-08 09:31:33 -07:00
Howard Mao
a50ba39ea7
Revert "add buffering and locking to TL -> Nasti converter"
...
This reverts commit 2109a48e18719383942d535ff4c1d0a859dcc424.
Conflicts:
src/main/scala/converters/Nasti.scala
2016-07-08 09:31:33 -07:00
Andrew Waterman
70b677ecda
Vec considered harmful; use isOneOf instead ( #64 )
...
Vec is heavyweight and really should only be used for I/O and
dynamic indexing. A recurring pattern in uncore is
Vec(const1, const2, const3) contains x
which is nice but has a deleterious effect on simulation copilation
and execution time. This patch proposes an alternative:
x isOneOf (const1, const2, const3)
x isOneOf seqOfThings
I think it's also more idiomatic.
This is just a prototype; I'm not wed to the name or implementation.
2016-07-07 19:25:57 -07:00
Howard Mao
16a6b11081
fix bug in AXI -> TL converter
2016-07-07 14:34:24 -07:00
Howard Mao
7cc64011fb
simplify amo_mask generation
2016-07-07 12:14:45 -07:00
Howard Mao
1c5e7be75b
make sure Nasti write channel id is set correctly
2016-07-07 12:14:02 -07:00
Howard Mao
8ccc50a8f0
fix IdMapper and TL -> NASTI converter
2016-07-07 10:16:44 -07:00
Howard Mao
5d8d5e598b
add buffering and locking to TL -> Nasti converter
2016-07-06 16:51:45 -07:00
Howard Mao
b10d306b4a
add option to log L2 cache transactions for easier debugging
2016-07-06 14:59:09 -07:00
Howard Mao
64afc795fd
make sure voluntary releases don't get allocated to L2WritebackUnit
2016-07-06 14:10:45 -07:00
Howard Mao
b105076996
fix ID mapper to disallow two in-flight requests with the same inner ID
2016-07-05 17:41:46 -07:00
Howard Mao
af76837970
conform to new NastiWriteDataChannel interface
2016-07-05 17:41:46 -07:00
Albert Ou
4c07aedfad
Rewrite BRAMSlave to infer a single BRAM instance
2016-07-05 14:21:21 -07:00
Howard Mao
702444709a
make sure pending bits updated for all releases
2016-07-05 12:08:22 -07:00
Howard Mao
06ed9c5794
add a single-entry queue in front of acquire and release for bufferless broadcast hub
2016-07-05 12:08:22 -07:00
Howard Mao
67bac383e3
hopefully fixed last bugs in Bufferless
2016-07-05 12:08:22 -07:00
