add some more warnings about the StatelessBridge
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@ -19,6 +19,15 @@ import cde.{Parameters, Field, Config}
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* - The outer transaction ID is large enough to handle all possible inner
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* transaction IDs, such that no remapping state must be maintained.
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*
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* This bridge DOES NOT keep the uncached channel coherent with the cached
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* channel. Uncached requests to blocks cached by the L1 will not probe the L1.
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* As a result, uncached reads to cached blocks will get stale data until
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* the L1 performs a voluntary writeback, and uncached writes to cached blocks
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* will get lost, as the voluntary writeback from the L1 will overwrite the
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* changes. If your tile relies on probing the L1 data cache in order to
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* share data between the instruction cache and data cache (e.g. you are using
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* a non-blocking L1 D$) or if the tile has uncached channels capable of
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* writes (e.g. Hwacha and other RoCC accelerators), DO NOT USE THIS BRIDGE.
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*/
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class ManagerToClientStatelessBridge(implicit p: Parameters) extends HierarchicalCoherenceAgent()(p) {
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