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make sure PseudoLRU is given power of 2 ways

This commit is contained in:
Howard Mao 2016-07-27 18:39:33 -07:00
parent 15d1aa9346
commit fbcc7317cf
1 changed files with 1 additions and 0 deletions
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uncore/src/main/scala/agents/Cache.scala
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@ -82,6 +82,7 @@ class SeqRandom(n_ways: Int) extends SeqReplacementPolicy {
class PseudoLRU(n: Int)
{
require(isPow2(n))
val state_reg = Reg(Bits(width = n))
def access(way: UInt) {
state_reg := get_next_state(state_reg,way)