riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

fix bug in AXI -> TL converter

Browse Source
This commit is contained in:
Howard Mao 2016-07-07 14:34:24 -07:00
parent 7cc64011fb
commit 16a6b11081
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
uncore/src/main/scala/converters/Nasti.scala
View File

@ -428,14 +428,14 @@ class TileLinkIONastiIOConverter(implicit p: Parameters) extends TLModule()(p)
io.nasti.b.valid := io.tl.grant.valid && tl_b_grant(io.tl.grant.bits)
io.nasti.b.bits := NastiWriteResponseChannel(
id = put_id_mapper.io.req.out_id)
id = put_id_mapper.io.resp.in_id)
assert(!io.nasti.b.valid || put_id_mapper.io.resp.matches,
"Put ID does not match")
io.nasti.r.valid := io.tl.grant.valid && !tl_b_grant(io.tl.grant.bits)
io.nasti.r.bits := NastiReadDataChannel(
id = get_id_mapper.io.req.out_id,
id = get_id_mapper.io.resp.in_id,
data = io.tl.grant.bits.data,
last = tl_last(io.tl.grant.bits))