Andrew Waterman
|
3a487ac89b
|
improve htif<->pcr interface
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2012-03-24 16:57:28 -07:00 |
|
Andrew Waterman
|
54fa6f660d
|
new supervisor mode
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2012-03-24 13:03:31 -07:00 |
|
Yunsup Lee
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65929a62e3
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fix reset value for appvl
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2012-03-22 15:32:04 -07:00 |
|
Yunsup Lee
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aaed0241af
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get rid of vxcptwait
|
2012-03-21 15:09:04 -07:00 |
|
Yunsup Lee
|
023734175d
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now fence stalls in decode
|
2012-03-20 17:10:05 -07:00 |
|
Yunsup Lee
|
e450e3aa40
|
fix irt counter bug regarding vector stuff
|
2012-03-20 17:09:54 -07:00 |
|
Yunsup Lee
|
7d7d7f49f9
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change the tlb arbiter to a round robing one
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2012-03-20 15:21:36 -07:00 |
|
Yunsup Lee
|
1cddd5de56
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fix amo locking up problem
|
2012-03-20 02:16:28 -07:00 |
|
Yunsup Lee
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56cb9b7a63
|
fix bug in coherence hub, specifically in abort handling logic
|
2012-03-20 02:16:28 -07:00 |
|
Yunsup Lee
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c036fff79c
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fix id interrupt signal
|
2012-03-19 15:13:57 -07:00 |
|
Yunsup Lee
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0edea00166
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now HAVE_VEC is true, since it passes the emulator
|
2012-03-19 03:10:00 -07:00 |
|
Yunsup Lee
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264732556f
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fixes to match verilog X semantics
|
2012-03-19 03:10:00 -07:00 |
|
Andrew Waterman
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bd27d0fab2
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can now take interrupts on stalled instructions
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2012-03-19 01:02:06 -07:00 |
|
Andrew Waterman
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2ed0be65f9
|
fix RRArbiter
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2012-03-19 00:19:33 -07:00 |
|
Yunsup Lee
|
ba06cd953e
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add chosen
|
2012-03-18 20:43:17 -07:00 |
|
Andrew Waterman
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c4a91303fb
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update vector fence names and encoding
|
2012-03-18 20:42:38 -07:00 |
|
Yunsup Lee
|
2a01f558ba
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fix unmasked valid bug in ctrl_vec
|
2012-03-18 19:55:24 -07:00 |
|
Yunsup Lee
|
98e10ddc3c
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update vector exception instructions
|
2012-03-18 16:36:12 -07:00 |
|
Yunsup Lee
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7493d55d3f
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add pf fault handling
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2012-03-18 15:06:39 -07:00 |
|
Yunsup Lee
|
62ada5ea9e
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hookup vitlb ptw port
|
2012-03-17 23:01:06 -07:00 |
|
Yunsup Lee
|
b793d63182
|
no vector interrupt masking
|
2012-03-17 23:01:06 -07:00 |
|
Yunsup Lee
|
8a4f95e617
|
changes to xcpt handling
|
2012-03-17 17:50:37 -07:00 |
|
Yunsup Lee
|
8c50c81b81
|
drop vec_irq_aux pcr register, now everything goes through badvaddr
|
2012-03-17 14:03:57 -07:00 |
|
Yunsup Lee
|
3b4680a834
|
add vitlb exception port
|
2012-03-17 14:03:33 -07:00 |
|
Andrew Waterman
|
a47eeb9571
|
retime D$ bypass into beginning of EX stage
|
2012-03-16 18:35:54 -07:00 |
|
Andrew Waterman
|
6c26921766
|
reduce D$ critical path through page table walker
costs an extra cycle per page table level to resolve a TLB miss. too bad.
|
2012-03-16 18:35:54 -07:00 |
|
Yunsup Lee
|
d38603a4ee
|
change number of tlb entries
|
2012-03-16 17:08:03 -07:00 |
|
Andrew Waterman
|
f0157b9e2a
|
fix coherence bug
popping wrong store dependence queue
|
2012-03-16 01:24:07 -07:00 |
|
Andrew Waterman
|
cfca2d1411
|
clean up cache interfaces; avoid reserved keywords
|
2012-03-16 00:44:16 -07:00 |
|
Andrew Waterman
|
820884c7e6
|
fix probes for smaller cache sizes
address bits (pgidx_bits-1,taglsb) were omitted from tag checks.
|
2012-03-15 23:08:30 -07:00 |
|
Andrew Waterman
|
4684171ac6
|
fix fence.i for associative caches
|
2012-03-15 21:23:21 -07:00 |
|
Andrew Waterman
|
2b0bc8df2b
|
use divided clk for htif. UDPATE YOUR FESVR
by default, we now load programs via a backdoor, because otherwise
it takes too long to simulate.
|
2012-03-15 18:36:51 -07:00 |
|
Yunsup Lee
|
ba566f246e
|
change icache parameters
|
2012-03-15 15:35:12 -07:00 |
|
Yunsup Lee
|
72006160dc
|
fix vxcptwait inst bug, it was incorrect when exception_valid was on before do_xcptwait
|
2012-03-15 02:10:21 -07:00 |
|
Yunsup Lee
|
f972977da1
|
refactored VMU, now uses one skid buffer
|
2012-03-15 01:10:17 -07:00 |
|
Henry Cook
|
b5fa86e844
|
4-way associative by default
|
2012-03-14 17:51:12 -07:00 |
|
Andrew Waterman
|
7dde7099d2
|
use broadcast hub and coherent HTIF
|
2012-03-14 16:44:35 -07:00 |
|
Yunsup Lee
|
b19d783fbd
|
add vector irq handler
|
2012-03-14 14:15:28 -07:00 |
|
Yunsup Lee
|
040d62f372
|
refactored vector exception handling interface
|
2012-03-13 23:45:34 -07:00 |
|
Yunsup Lee
|
b100544b25
|
datapath to read out vector state
|
2012-03-13 23:45:34 -07:00 |
|
Yunsup Lee
|
5655dbd5da
|
add vvcfg and vtcfg instructions
|
2012-03-13 23:45:34 -07:00 |
|
Andrew Waterman
|
ab6c9350db
|
fix minor coherence bugs
|
2012-03-13 19:10:54 -07:00 |
|
Andrew Waterman
|
1788c34113
|
parameterize broadcast hub by # of tiles
|
2012-03-13 17:12:01 -07:00 |
|
Andrew Waterman
|
1492457df5
|
add probe replies to HTIF
|
2012-03-13 16:56:47 -07:00 |
|
Andrew Waterman
|
b0f798962c
|
add probe unit
|
2012-03-13 16:43:51 -07:00 |
|
Huy Vo
|
fdffb124e3
|
Merge branch 'master' of github.com:ucb-bar/riscv-rocket
|
2012-03-13 12:34:39 -07:00 |
|
Huy Vo
|
6fd1527476
|
fix to rocket vec_dpath, updating makefiles to run xcpt test cases
|
2012-03-13 12:34:02 -07:00 |
|
Henry Cook
|
287bc1c262
|
Further refinement of tag_match/tag_hit signals
|
2012-03-13 11:48:12 -07:00 |
|
Andrew Waterman
|
d76b05bde1
|
fix way selection on D$ write upgrades
|
2012-03-13 02:21:02 -07:00 |
|
Andrew Waterman
|
fd29e00db0
|
support non-power-of-2 queue sizes
need to manually wrap queue pointers.
|
2012-03-13 01:58:28 -07:00 |
|