This website requires JavaScript.
Explore
Help
Sign In
riscv
/
rocket-chip
Watch
1
Star
0
Fork
0
You've already forked rocket-chip
Code
Releases
Activity
339
Commits
1
Branch
0
Tags
2b0bc8df2b0f66c3fc5a9c73ebbc22ea969e2e34
Go to file
Code
Clone
HTTPS
Tea CLI
Open with VS Code
Open with VSCodium
Open with Intellij IDEA
Download ZIP
Download TAR.GZ
Download BUNDLE
Andrew Waterman
2b0bc8df2b
use divided clk for htif. UDPATE YOUR FESVR
...
by default, we now load programs via a backdoor, because otherwise it takes too long to simulate.
2012-03-15 18:36:51 -07:00
rocket/src/main
/scala
use divided clk for htif. UDPATE YOUR FESVR
2012-03-15 18:36:51 -07:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%