Yunsup Lee
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395e4e3dd6
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andrew'x fix for D$ corner case in writeback->abort->probe
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2012-11-18 03:11:06 -08:00 |
|
Yunsup Lee
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06eeb90e2a
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vector unit interfaces to the new D$
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2012-11-17 20:07:41 -08:00 |
|
Yunsup Lee
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81d711e892
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fix D$ bug; now D$ doesn't respond to prefetches
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2012-11-17 20:06:13 -08:00 |
|
Andrew Waterman
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29bc361d6c
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remove global constants; disentangle hwacha a bit
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2012-11-17 17:24:08 -08:00 |
|
Andrew Waterman
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5a7777fe4d
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clock gate integer datapath more aggressively
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2012-11-17 06:48:44 -08:00 |
|
Andrew Waterman
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cc067026a2
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pipeline D$ response -> FPU regfile
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2012-11-17 06:48:11 -08:00 |
|
Andrew Waterman
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e68b039133
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fix misc. D$ control bugs
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2012-11-17 06:47:27 -08:00 |
|
Andrew Waterman
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dad7b71062
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provide cmd/addr with cache response
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2012-11-16 21:26:12 -08:00 |
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Andrew Waterman
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cb8ac73045
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provide store data with cache response
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2012-11-16 21:15:13 -08:00 |
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Andrew Waterman
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9e010beffe
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fix D$ refill bug
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2012-11-16 21:05:29 -08:00 |
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Andrew Waterman
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8dce89703a
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new D$ with better QoR and AMO pipelining
Vector unit is disabled because nack handling needs to be fixed.
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2012-11-16 02:39:33 -08:00 |
|
Andrew Waterman
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a90a1790a5
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improve tlb qor
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2012-11-16 01:59:38 -08:00 |
|
Andrew Waterman
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ff8c736d94
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move icache invalidate out of request bundle
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2012-11-16 01:55:45 -08:00 |
|
Andrew Waterman
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6d10115b19
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fix D$ tag width
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2012-11-15 16:46:39 -08:00 |
|
Yunsup Lee
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be1980dd2d
|
refactored vector queue interface
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2012-11-07 01:15:33 -08:00 |
|
Yunsup Lee
|
8764fe786a
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refactored vector tlb
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2012-11-06 23:53:52 -08:00 |
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Yunsup Lee
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9a02298f6f
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andrew's fix for tlb lockup
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2012-11-06 23:52:58 -08:00 |
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Andrew Waterman
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4d1ca8ba3a
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remove more global consts; refactor DTLBs
D$ now contains DTLB. provide full VAddr with initial request.
VU now has its own DTLBs.
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2012-11-06 08:13:44 -08:00 |
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Andrew Waterman
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e76892f758
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remove more global constants
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2012-11-06 02:55:45 -08:00 |
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Andrew Waterman
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c5b93798fb
|
factor out more global constants
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2012-11-05 23:52:32 -08:00 |
|
Yunsup Lee
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ee081d1671
|
modify code to fix UFix := Bits error
|
2012-11-05 01:35:55 -08:00 |
|
Yunsup Lee
|
2a25307a8f
|
revamp the vector unit with the new frontend
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2012-11-05 01:35:55 -08:00 |
|
Andrew Waterman
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5b20ed71be
|
move rd=0 check into bypass logic
before, the check was in the write enable logic, but moving it obviated
an awkward corner case for mtpcr with rd=0.
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2012-11-05 01:30:57 -08:00 |
|
Andrew Waterman
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5e103054fd
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fix bug in quine mccluskey
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2012-11-05 00:28:25 -08:00 |
|
Andrew Waterman
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e9eca6a95d
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refactor I$ config; remove Top class
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2012-11-04 16:59:36 -08:00 |
|
Andrew Waterman
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7380c9fe60
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aggressively clock gate int and fp datapaths
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2012-11-04 16:40:14 -08:00 |
|
Andrew Waterman
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bd2d61de03
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use 8T SRAM for I$; gate clock more aggressively
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2012-11-04 16:39:25 -08:00 |
|
Andrew Waterman
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fedee6c67d
|
add generic error correcting codes
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2012-10-30 01:03:47 -07:00 |
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Andrew Waterman
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5773cbb68a
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rejigger htif to use UncoreConfiguration
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2012-10-18 17:26:03 -07:00 |
|
Henry Cook
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e2eb7ce8e9
|
Cleanup git incompetence
|
2012-10-16 16:54:58 -07:00 |
|
Henry Cook
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88ac5af181
|
Merged consts-as-traits
|
2012-10-16 16:32:35 -07:00 |
|
Henry Cook
|
6cff1c13d8
|
Refer to traits moved to uncore, add UncoreConfiguration to top
|
2012-10-16 14:22:23 -07:00 |
|
Andrew Waterman
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b9a2af697d
|
turn off HAVE_VEC as it's currently broken
the new I$/frontend needs to be integrated
|
2012-10-16 07:38:19 -07:00 |
|
Andrew Waterman
|
0a640f2cc6
|
make DecodeLogic deterministic (hopefully)
|
2012-10-16 04:51:21 -07:00 |
|
Andrew Waterman
|
5821900329
|
don't refetch from I$ if on same 16B block
|
2012-10-16 02:24:38 -07:00 |
|
Andrew Waterman
|
b955985b38
|
improve divider QoR
|
2012-10-16 02:24:38 -07:00 |
|
Andrew Waterman
|
197154c485
|
use BTB for JALR
|
2012-10-16 02:24:37 -07:00 |
|
Andrew Waterman
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fc648d13a1
|
remove old Mux1H; add implicit conversions
|
2012-10-16 02:24:37 -07:00 |
|
Andrew Waterman
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661f8e635b
|
merge I$, ITLB, BTB into Frontend
|
2012-10-16 02:24:37 -07:00 |
|
Andrew Waterman
|
fcd69dba98
|
add optional early-out to mul/div
|
2012-10-16 02:24:37 -07:00 |
|
Andrew Waterman
|
27ddff1adb
|
simplify and improve multiplier
|
2012-10-16 02:24:37 -07:00 |
|
Henry Cook
|
8970b635b2
|
improvements to implicit RocketConfiguration parameter
|
2012-10-15 16:29:49 -07:00 |
|
Henry Cook
|
a7a4e65690
|
Initial verison of reading config from files
|
2012-10-15 16:05:50 -07:00 |
|
Henry Cook
|
5d2a470215
|
all rocket-specific arbiters in one file and refactored traits slightly
|
2012-10-15 16:05:32 -07:00 |
|
Huy Vo
|
1864e41361
|
memserdes + slowio out of rocket and into uncore
|
2012-10-10 15:25:24 -07:00 |
|
Huy Vo
|
fe21142972
|
fixed memdessert unpacking
|
2012-10-09 13:03:17 -07:00 |
|
Henry Cook
|
9025d0610c
|
first pass at configuration object passed as implicit parameter
|
2012-10-07 22:37:29 -07:00 |
|
Henry Cook
|
dfdfddebe8
|
constants as traits
|
2012-10-07 22:20:03 -07:00 |
|
Henry Cook
|
b5ff436092
|
decode constant object split into multiple objects
|
2012-10-05 15:50:42 -07:00 |
|
Andrew Waterman
|
ed8cc4a1cf
|
eliminate D$ probe->WB critical path
|
2012-10-04 09:05:14 -07:00 |
|