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Commit Graph

310 Commits

Author SHA1 Message Date
Andrew Waterman
df8aff0906 don't dequeue probe queue during reset 2012-07-22 21:05:52 -07:00
Andrew Waterman
c6ac836581 don't dequeue probe queue during reset 2012-07-22 21:05:52 -07:00
Andrew Waterman
d01e70c672 decouple all interfaces between tile and top
also, add an "incoherent" bit to tilelink to indicate no probes needed
2012-07-17 22:55:40 -07:00
Andrew Waterman
0258dfb23f decouple all interfaces between tile and top
also, add an "incoherent" bit to tilelink to indicate no probes needed
2012-07-17 22:55:40 -07:00
Huy Vo
a79747a062 INPUT/OUTPUT orderring swapped 2012-07-12 18:16:57 -07:00
Huy Vo
18bc14058b INPUT/OUTPUT orderring swapped 2012-07-12 18:16:57 -07:00
Andrew Waterman
62a3ea4113 fix some LLC bugs 2012-07-11 17:56:39 -07:00
Andrew Waterman
0aa33bf909 fix some LLC bugs 2012-07-11 17:56:39 -07:00
Andrew Waterman
1ebfeeca8a add L2$
It still has performance bugs but no correctness bugs AFAIK.
2012-07-10 05:23:29 -07:00
Andrew Waterman
66cf690261 add L2$
It still has performance bugs but no correctness bugs AFAIK.
2012-07-10 05:23:29 -07:00
Huy Vo
166b857055 ioDecoupled -> FIFOIO, ioPipe -> PipeIO 2012-06-06 18:22:56 -07:00
Huy Vo
0c6bade592 ioDecoupled -> FIFOIO, ioPipe -> PipeIO 2012-06-06 18:22:56 -07:00
Huy Vo
9b3161920f moving util out into Chisel standard library 2012-06-06 12:51:26 -07:00
Huy Vo
f2942f79f9 moving util out into Chisel standard library 2012-06-06 12:51:26 -07:00
Huy Vo
6f2f1ba21c removing wires 2012-05-24 10:42:39 -07:00
Huy Vo
0208e9f95e removing wires 2012-05-24 10:42:39 -07:00
Andrew Waterman
f804c57bb0 reduce HTIF clock divider for now 2012-05-03 04:21:11 -07:00
Henry Cook
99bc99f2ad Fixed abort bug: removed uneeded state, added mshr guard on xact_abort.valid and xact_init.ready on same cycle 2012-04-24 17:17:42 -07:00
Henry Cook
00155f4bc4 Fixed abort bug: removed uneeded state, added mshr guard on xact_abort.valid and xact_init.ready on same cycle 2012-04-24 17:17:42 -07:00
Henry Cook
d61e6ee080 Fixed coherence bug: probe counting for single tile 2012-04-24 17:17:13 -07:00
Henry Cook
37eb1a4ae6 Fixed coherence bug: probe counting for single tile 2012-04-24 17:17:13 -07:00
Henry Cook
4a6c7dbc26 Policy determined by constants. MSI policy added. 2012-04-11 17:56:59 -07:00
Andrew Waterman
98a5d682a5 coherence mostly works now 2012-04-10 02:22:45 -07:00
Andrew Waterman
2a7d2888a7 coherence mostly works now 2012-04-10 02:22:45 -07:00
Henry Cook
1920c97066 Refactored coherence as member rather than trait. MI and MEI protocols. 2012-04-10 00:09:58 -07:00
Henry Cook
b22d7f8192 Refactored coherence as member rather than trait. MI and MEI protocols. 2012-04-10 00:09:58 -07:00
Henry Cook
5acf1d9820 defined abstract coherence traits in base trait, added Incoherent trait, cleaned up incoherent policy 2012-04-09 23:29:32 -07:00
Henry Cook
e71e3ce38f defined abstract coherence traits in base trait, added Incoherent trait, cleaned up incoherent policy 2012-04-09 23:29:32 -07:00
Henry Cook
a68f5e016d changed coherence type width names to represent max sizes for all protocols 2012-04-09 23:29:32 -07:00
Henry Cook
17a5d26c1e changed coherence type width names to represent max sizes for all protocols 2012-04-09 23:29:32 -07:00
Henry Cook
f7307ee411 changed coherence message type names 2012-04-09 23:29:31 -07:00
Henry Cook
6bc47a55b4 changed coherence message type names 2012-04-09 23:29:31 -07:00
Henry Cook
d301336c33 Refactored coherence better from uncore hub, better coherence function names 2012-04-09 23:29:31 -07:00
Henry Cook
27e3346c14 Refactored coherence better from uncore hub, better coherence function names 2012-04-09 23:29:31 -07:00
Andrew Waterman
73d8d42515 fix coherence bug with multiple probe replies 2012-04-09 21:40:35 -07:00
Andrew Waterman
257747a3a1 no dessert tonight :( 2012-03-26 23:50:09 -07:00
Andrew Waterman
25fe46dc18 remove bug from dessert 2012-03-26 14:18:57 -07:00
Andrew Waterman
4e6302fedc add dessert 2012-03-25 23:03:20 -07:00
Andrew Waterman
5a00143035 loop host.in to host.out during reset 2012-03-25 21:45:10 -07:00
Andrew Waterman
a7ebea13fc add mem serdes unit 2012-03-25 17:03:58 -07:00
Yunsup Lee
5f69c5a764 fix bug in coherence hub, specifically in abort handling logic 2012-03-20 02:16:28 -07:00
Andrew Waterman
e38114e4b0 fix coherence bug
popping wrong store dependence queue
2012-03-16 01:24:07 -07:00
Andrew Waterman
3129040bda use divided clk for htif. UDPATE YOUR FESVR
by default, we now load programs via a backdoor, because otherwise
it takes too long to simulate.
2012-03-15 18:36:51 -07:00
Andrew Waterman
77c405ffa1 use broadcast hub and coherent HTIF 2012-03-14 16:44:35 -07:00
Andrew Waterman
53cd543d3f fix minor coherence bugs 2012-03-13 19:10:54 -07:00
Andrew Waterman
53d69d3006 parameterize broadcast hub by # of tiles 2012-03-13 17:12:01 -07:00
Andrew Waterman
1258f31825 add probe unit 2012-03-13 16:43:51 -07:00
Huy Vo
1b733e7cf0 Merge branch 'master' of github.com:ucb-bar/riscv-rocket 2012-03-13 12:34:39 -07:00
Huy Vo
6e32cc8b20 Merge branch 'master' of github.com:ucb-bar/riscv-rocket 2012-03-13 12:34:39 -07:00
Henry Cook
23c822a82e fix hit logic for amos 2012-03-12 22:01:52 -07:00