riscv/rocket-chip
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Huy Vo a79747a062 INPUT/OUTPUT orderring swapped
2012-07-12 18:16:57 -07:00
uncore
INPUT/OUTPUT orderring swapped
2012-07-12 18:16:57 -07:00
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Description
Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
13 MiB
Languages
Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
Verilog 0.8%
Other 0.7%