riscv/rocket-chip
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Author SHA1 Message Date
Wesley W. Terpstra
ef2aae26a8 ahb: rename hreadyout to standard hready, mark hreadyin for death 2016-05-24 14:14:21 -07:00
Wesley W. Terpstra
2f8a77f27a ahb: include all AHB-lite constants 2016-05-24 14:14:21 -07:00
Wesley W. Terpstra
7896c4157e ahb: parameterize poci 2016-05-24 14:14:21 -07:00
Wesley W. Terpstra
93447eb274 ahb: make hasti parameters location sensitive 2016-05-24 14:14:17 -07:00
Howard Mao
44740cb6b2 parameterize Hasti address and data bits 2016-05-06 11:30:50 -07:00
Howard Mao
64991d3947 add AXI to AHB converter 2016-05-06 11:30:50 -07:00
Howard Mao
be21f6962b make GlobalAddrHashMap a config variable 2016-05-02 18:22:43 -07:00
Andrew Waterman
e4ace55d77 Address Map refactoring 2016-04-28 16:12:35 -07:00
Andrew Waterman
c8b1f0801b Remove start address option from AddrMapEntries 
It appears to never be used, and clutters things.  The new invariant is
that AddrMaps are relative and AddrHashMaps are absolute.
 2016-04-27 14:52:05 -07:00
Andrew Waterman
d3dee2c6c6 support countSlaves on empty address maps 2016-04-27 14:51:52 -07:00
Howard Mao
6260ad56e8 stop using MMIOBase and encode cacheability in address map 2016-04-21 15:33:53 -07:00
Howard Mao
1967186a96 add id field to NastiWriteDataChannel 2016-04-19 09:39:45 -07:00
Howard Mao
42c4d1e51f add NastiMemoryDemux 2016-04-19 09:39:15 -07:00
Howard Mao
0bf8d07aba make AtosSerializedIO clock divisible 2016-04-19 09:39:15 -07:00
Howard Mao
1dc8af894e fix serializer/deserializer and add Atos serdes/desser 2016-04-19 09:39:15 -07:00
Howard Mao
d66d8f0cd4 fix SMI converter 2016-04-01 18:32:15 -07:00
Howard Mao
015992bc9e no longer need MIFMasterTagBits 2016-03-28 12:24:11 -07:00
Howard Mao
34852e406d fix bug in NastiRouter 2016-03-28 12:22:43 -07:00
Eric Love
db09f310a1 Define MIFMasterTagBits as # bits a master can *use* in tag 2016-03-11 16:48:13 -08:00
Howard Mao
4f5b1da58b add a resp_len helper to AtosRequest 2016-02-23 16:24:32 -08:00
Howard Mao
db3b2c264c Add constructors, converters, and serdes for AXI tunneled over SERDES (AtoS) 2016-02-23 16:24:32 -08:00
Howard Mao
fbd66ac87b expose a count in MultiWidthFifo 2016-02-19 11:20:43 -08:00
Howard Mao
5241ee6442 add multi-width FIFO 2016-02-19 11:20:43 -08:00
Palmer Dabbelt
770f2742de Make NastiMemorySelector a subtype of NastiInterconnect 
When RocketChip has a single memory configuration I want to ensure no extra
hardware is being generated by only instantiating a NastiMemoryInterconnect
rather than a NastiMemorySelector, which I believe will insert a Mux with 0
when there is only one config (because there aren't any 0-width wires allowed).
 2016-02-17 10:41:01 -08:00
Palmer Dabbelt
6b39db8ce6 Add "NastiMemorySelector", a memory interconnect 
On Hurricane we want to be able to support multiple memory channels but have a
fallback to fewer, since the full configuration is going to require a
complicated FPGA setup.  This adds another sort of interconnect that can switch
between having different numbers of top-level memory channels active at chip
boot time.

This interconnect is a bit funny: changing the select input when there is
memory traffic is a bad idea.  This is fine for this use case, since we really
only care about changing the memory configuration at boot time -- since it'll
scramble the memory of the machine it's not so useful, anyway.

The advantage is that we don't have to have a full 8x8 Nasti crossbar in our
chip, which would be fairly expensive.  Changing the crossbar would garble
memory as well, so it's not like it would add any extra functionality.
 2016-02-16 23:59:01 -08:00
Howard Mao
fef8a2d862 make sure NastiIOStreamIOConverter does not depend on external last signal 2016-02-15 09:48:35 -08:00
Andrew Waterman
b4856da819 Merge pull request #6 from ucb-bar/chisel3 
Chisel 3 Support
 2016-02-05 17:15:49 -08:00
Palmer Dabbelt
62257e0b04 Uncomment MemSerializedIO.cloneType() 
Not sure why this was commented, but when I build this against Chisel3 it fails
without this override.
 2016-02-04 15:28:46 -08:00
Palmer Dabbelt
be424633c1 Improve ParamaterizedBundle.cloneType()'s error messages 
Without this it's really hard to read the IllegalArgumentException that you get
if you subclass ParamaterizedBundle and don't define a matching cloneType().
 2016-02-04 15:26:42 -08:00
Howard Mao
60d9291cb5 rename external to nastiExternal to avoid name conflicts 2016-02-02 13:14:04 -08:00
Howard Mao
bfdf5a538a Separate memory interconnect from IO interconnect. 
Since we're separating memory and MMIO traffic in the L1 to L2 network,
we won't need to route between memory and MMIO at the AXI interconnect.
This means we can have separate (and simpler) AXI interconnects for
each. One consequence of this is that the starting address of the IO
interconnect can no longer be assumed to be 0 by default.
 2016-02-02 13:14:04 -08:00
Andrew Waterman
a56a502ced Add missing cloneType method 
@zhemao
 2016-01-23 21:36:16 -08:00
Howard Mao
19c526de59 move ReorderQueue and DecoupledHelper in from uncore 2016-01-21 15:37:07 -08:00
Howard Mao
6a0352c6d0 fix up SmiMem 2016-01-20 23:25:16 -08:00
Andrew Waterman
335fb73120 Chisel3 compatibility fix 
No need for a Vec here.
 2016-01-15 15:17:16 -08:00
Howard Mao
c8fa7c43a9 fix Chisel3 deprecation warnings 2016-01-14 13:38:00 -08:00
Howard Mao
5d7b5b219f lowercase SMI to Smi 2016-01-11 16:18:38 -08:00
Howard Mao
9d2637c2c7 support empty submaps in interconnect generator 2016-01-07 11:55:24 -08:00
Howard Mao
673f73b051 add support for AXI streaming protocol 2016-01-05 20:04:49 -08:00
Howard Mao
c57639b23f reverse order of RWX bits for compatibility 2015-12-05 00:27:24 -08:00
Howard Mao
7083576156 fix typo in NastiErrorSlave 2015-11-26 12:57:04 -08:00
Howard Mao
e7e281275a implement MultiChannel routing in a specialized (and more performant) way 2015-11-18 17:01:52 -08:00
Howard Mao
3e906c8620 shave off channel select bits in MultiChannel router 2015-11-02 22:39:50 -08:00
Howard Mao
096dbb3c2d get rid of NastiTopInterconnect 2015-10-26 14:14:53 -07:00
Howard Mao
5440d6c2ae balance MultiChannel router correctly 2015-10-26 12:23:03 -07:00
Howard Mao
3270d17ad3 add MultiChannel routing to Nasti interconnect generator 2015-10-26 12:16:17 -07:00
Jim Lawson
8fe4917d8e Add ability to generate libraryDependency on cde. 2015-10-22 09:52:26 -07:00
Henry Cook
9c3cd8f9fe depend on external cde library 2015-10-21 18:16:03 -07:00
Howard Mao
11eacda84a generalize NastiReadDataArbiter 2015-10-20 18:36:19 -07:00
Yunsup Lee
cedef98045 fix NASTI -> MemIO converter bug 2015-10-19 21:43:59 -07:00