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Commit Graph

90 Commits

Author SHA1 Message Date
Andrew Waterman
2ed0be65f9 fix RRArbiter 2012-03-19 00:19:33 -07:00
Yunsup Lee
ba06cd953e add chosen 2012-03-18 20:43:17 -07:00
Andrew Waterman
7dde7099d2 use broadcast hub and coherent HTIF 2012-03-14 16:44:35 -07:00
Henry Cook
c5dd37ae80 bugfix in locking arbiter 2012-03-11 15:47:27 -07:00
Henry Cook
4ebf637642 More broadcast hub bugfixes 2012-03-11 14:17:27 -07:00
Andrew Waterman
e3a68848e0 fix D$ critical paths and fix verilog build 2012-03-09 20:02:51 -08:00
Andrew Waterman
766bac88f8 refactor D$ writebacks and flushes
MSHRs now arbitrate for writebacks and handle flushes.
2012-03-09 02:55:46 -08:00
Henry Cook
7f43dee0c9 PriorityEncoder apply() no longer has recursive depth param 2012-03-08 01:04:26 -08:00
Andrew Waterman
6e2610b0ad fix Mux1H for bundles 2012-03-06 23:38:36 -08:00
Henry Cook
962e5a54af Added store dependency queues to BroadcastHub. Minor improvements to utils. 2012-03-06 15:54:41 -08:00
Andrew Waterman
1e1926ce63 flip direction of ioPipe to match ioDecoupled 2012-03-02 16:18:32 -08:00
Yunsup Lee
8678b3d70c clean up ioDecoupled/ioPipe interface 2012-03-01 20:48:46 -08:00
Henry Cook
da39810bb2 Fixed elaboration errors in LockingArbiter and BoradcastHub. Fixed ioDecoupled direction error in XactTracker 2012-03-01 18:24:22 -08:00
Henry Cook
c6162ac743 Unified hub ios. Fixed some hub elaboration errors. 2012-03-01 01:20:57 -08:00
Henry Cook
008ad1f45b Added 'locking' arbiter that won't rearbitrate until the lock signal on the current winning input is low 2012-02-29 17:05:06 -08:00
Henry Cook
c723ef4c50 ioDecoupled now allows inner bundle to be used in covariant positions, i.e. it accepts subtypes 2012-02-29 16:46:16 -08:00
Andrew Waterman
c38065d0e8 clean up priority encoders 2012-02-29 16:13:14 -08:00
Andrew Waterman
012da6002e replace tile memory interface with ioTileLink
work in progress towards coherent HTIF. for now, requests
are incoherently passed through a null coherence hub.
2012-02-29 03:10:47 -08:00
Yunsup Lee
94ba32bbd3 change package name and sbt project name to rocket 2012-02-25 17:09:26 -08:00
Henry Cook
db6d480778 Better foldR 2012-02-25 15:27:09 -08:00
Henry Cook
4fa31b300b Added popcount util 2012-02-25 12:57:01 -08:00
Andrew Waterman
0ec7767c13 declaring success on FPU for now 2012-02-14 19:11:57 -08:00
Andrew Waterman
725190d0ee update to new chisel 2012-02-11 17:20:33 -08:00
Henry Cook
c5a4eaa0a1 Associative cache, boots kernel 2012-02-01 13:26:04 -08:00
Henry Cook
281abfbccb New Mux1H constructor 2012-02-01 13:24:28 -08:00
Andrew Waterman
97c379f1d7 made I$ associative 2012-01-24 16:51:30 -08:00
Henry Cook
aa3465699b LFSR now a util 2012-01-24 15:26:19 -08:00
Henry Cook
8766438bb9 Updated chisel removes ^^ from language. Removed from rocket source, updated jar. 2012-01-23 17:09:23 -08:00
Henry Cook
97f0852b17 DM cache with assoc-aware subunits passes all asm and bmarks 2012-01-18 17:53:26 -08:00
Henry Cook
29ed8eb31a More utils for nbdcache 2012-01-18 17:09:35 -08:00
Henry Cook
7e25749581 Groundwork for assoc cache implementation 2012-01-18 17:09:35 -08:00
Henry Cook
1d76255dc1 new chisel version jar and find and replace INPUT and OUTPUT 2012-01-18 14:39:57 -08:00
Andrew Waterman
d65e1a2eee vlsi verilog compiles now but doesn't simulate 2011-12-20 22:08:27 -08:00
Andrew Waterman
96c78829b4 improve ALU and fix revealed emulator bug 2011-12-17 07:20:32 -08:00
Andrew Waterman
a8d0cd95e6 hellacache now works 2011-12-17 03:26:11 -08:00
Andrew Waterman
56c4f44c2a hellacache returns!
but AMOs are unimplemented.
2011-12-12 06:49:39 -08:00
Andrew Waterman
8308345364 work in progress on hellacache 2011-12-10 07:01:47 -08:00
Andrew Waterman
218f63e66e code cleanup/parameterization 2011-12-09 00:42:43 -08:00
Rimas Avizienis
f86d5b1334 cleanup, lots of minor fixes, added more PCR regs (COREID, NUMCORES), parameterized BTB 2011-11-10 11:26:13 -08:00
Rimas Avizienis
e96430d862 integrating ITLB & PTW 2011-11-09 14:52:17 -08:00