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Commit Graph

535 Commits

Author SHA1 Message Date
2825b2d645 make sure TL to NASTI converter handles MT_WU 2016-02-10 11:06:41 -08:00
66e9cc8c82 make sure CSR width is parameterizable 2016-02-02 12:49:58 -08:00
adaec18bec add TL manager for MMIO requests 2016-02-02 12:49:58 -08:00
c1fe188c81 some fixes to RTC 2016-02-02 12:49:58 -08:00
ba94010928 DMA requests should go through MMIO 2016-02-02 12:49:58 -08:00
0dc8cd5b11 move ReorderQueue and DecoupledHelper to junctions 2016-01-21 15:36:22 -08:00
2946bc928e Avoid muxing between bundles of different size 2016-01-16 19:01:24 -08:00
4ff1aea288 fix more Chisel3 deprecations 2016-01-14 14:55:45 -08:00
0b90b8fe5f Avoid zero-width wire case :-/ 2016-01-12 15:32:29 -08:00
a953ff384a Chisel3 compatibility: use more concrete types 2016-01-12 15:32:14 -08:00
c81745eb8e lowercase SMI to Smi 2016-01-11 16:18:44 -08:00
d0a14c6de9 separate TileLink converter/wrapper/unwrapper/narrower into separate file 2016-01-11 16:14:56 -08:00
46069ea13b implement streaming DMA functionality 2016-01-06 21:37:56 -08:00
09f3c5a6e3 Merge pull request #6 from ucb-bar/dma
Implement DMA engine
2015-12-21 13:54:38 -08:00
872b162e1b implement DMA engine 2015-12-16 21:27:31 -08:00
8a61177224 generalize TwoWayCounter 2015-12-16 21:07:30 -08:00
a48237f36d get rid of the rest of the PutBlock special casing in L2 2015-12-16 20:56:29 -08:00
922b1adc9c Add optional PLRU replacement to the L2 2015-12-16 10:00:56 -08:00
ddc79674f9 fix some issues with cache request merging 2015-12-15 21:31:02 -08:00
e71293e2ae fix bug in narrower logic 2015-12-06 02:58:12 -08:00
93aa370b87 yunsup's fix for dgemm-opt assertion failure 2015-12-03 14:03:10 -08:00
e52685f2e9 Fix LoadGen zero flag 2015-11-25 20:52:30 -08:00
27df04354f Add ROM with NASTI interface 2015-11-25 20:04:31 -08:00
57e82442a1 Make LoadGen and StoreGen generic 2015-11-24 18:12:42 -08:00
ee6514e4f4 make sure WritebackUnit sends correct probe addresses 2015-11-21 15:55:11 -08:00
04383a31f5 Revert "make sure L2MetadataArray assigns unoccupied way if available"
This reverts commit 1857f36c1e6f2b2859c724eea6ae3cfb2618f81b.
2015-11-21 10:35:40 -08:00
3c95afebc6 Shift set index for multi-bank configurations
Prior to this commit, the L2 cache banks used the lower bits of the
block address as the set index. However, the lower bits are also used to
route addresses to different banks. As a result, in multi-bank
configurations, only a fraction of the sets in each bank could be
accessed. This commit fixes that problem by using the bits ahead of the
bank index as the set index, so that all sets in the cache can be
accessed.
2015-11-20 23:24:57 -08:00
55a85cc67a make sure wmask is passed for PutBlock in broadcast hub 2015-11-20 14:09:24 -08:00
941b64cd62 make partial write-masking PutBlock constructor always set alloc bit 2015-11-20 13:34:07 -08:00
24f7b9f472 make sure L2MetadataArray assigns unoccupied way if available 2015-11-19 10:45:54 -08:00
e50c7ad306 add NASTI error assertions back in 2015-11-18 17:05:54 -08:00
2b977325e3 Make prefetch type available in a_type, issue probeInvalidates for putPrefetches 2015-11-16 23:26:13 -08:00
d426ecee78 Remove IPI network
This is now provided via MMIO.
2015-11-16 21:52:24 -08:00
0290635454 amo_shift_bits -> amo_shift_bytes 2015-11-16 19:07:58 -08:00
64aaf71b06 L2AcquireTracker refactor to support merging Gets and Puts into Prefetches of the correct type.
Transaction metadata for primary and seconday misses now stored in the secondary miss queue.

Added BuiltInAcquireBuilder factory.
2015-11-16 18:10:09 -08:00
03fa06e6e7 fix prefetch lockup on L2 hit 2015-11-15 12:51:34 -08:00
e12efab423 skip meta_write state if no meta write pending 2015-11-13 13:50:35 -08:00
7e7d688a01 make sure L2 passes no-alloc acquires through to outer memory 2015-11-12 15:40:58 -08:00
b3865c370a make sure correct addr_beat is sent for Get response by narrower/converter 2015-11-12 15:40:38 -08:00
f397d61033 add alloc option to Put constructor 2015-11-12 11:39:59 -08:00
7733fbe6a3 make sure no-alloc write still updates data array if there is a cache hit 2015-11-12 11:39:36 -08:00
b59ce5fed4 make sure L2 waits for outer grant before sending grant for write request 2015-11-10 16:06:14 -08:00
42d3d09d7a add a ClientTileLinkEnqueuer to complement the TileLinkEnqueuer 2015-11-09 11:49:19 -08:00
7942be4e01 make sure outerTL method is idempotent 2015-11-09 11:10:02 -08:00
e3efc09b5b remove unnecessary UInt encode/decode on releaseMatches path 2015-11-05 17:20:03 -08:00
3698153535 OHToUInt instead of PriorityEncoder on Acq/RelMatches signals in L2Bank 2015-11-03 14:31:35 -08:00
baa2544651 Fix some more issues with narrower 2015-10-31 19:36:30 -07:00
812c5bcc55 make sure narrower can handle sub-block level requests correctly 2015-10-31 15:58:36 -07:00
d4b8653002 fix too strict assertion in broadcast hub 2015-10-31 15:58:10 -07:00
c10870a87c make sure ID width requirement in TL -> NASTI converter is correct 2015-10-27 13:25:29 -07:00