a999c055ed
Don't take an interrupt when EX stage PC is invalid
...
It was possible to take an interrupt on the instruction in the shadow of
a short forward branch. EPC would thus get the wrong value, and so
a wrong-path instruction would be executed upon return from interrupt.
h/t Yunsup
2014-09-11 01:46:52 -07:00
b42a2ab40a
Final parameter refactor
2014-09-01 13:28:58 -07:00
0dac9a7467
Full conversion to params. Compiles but does not elaborate.
2014-08-19 11:38:02 -07:00
910b3b203a
removed AddressSpaceConstants, CacheConstants, and TileLinkSizeConstants
2014-04-10 12:32:44 -07:00
f235fa0db6
Move branch resolution to M stage
2014-04-07 15:58:49 -07:00
db59fc65ab
Add return address stack
2014-04-01 15:01:27 -07:00
ac4b3f9f22
print out core id
2014-03-04 23:38:49 -08:00
98b830201a
add wen signal to dasm printf
2014-02-25 03:31:06 -08:00
97b1841fcf
change dcache tag bits to 7
2014-02-22 22:53:04 -08:00
a09ff9fdc7
Revert to old AUIPC definition
2014-02-10 19:04:42 -08:00
f021213b1d
Merge remote-tracking branch 'origin/master' into hwacha-port
2014-02-06 00:21:28 -08:00
62e9313aef
Add 16 microarchitectural counters
2014-02-06 00:13:02 -08:00
ff7cae29f7
hookup rocc interrupt and s bit
2014-02-06 00:09:42 -08:00
a7489920ce
Support CSR atomics on all CSRs, not just STATUS
2014-01-21 16:17:39 -08:00
e8486817e6
Clean up formatting (i.e. remove tabs, semicolons)
2014-01-13 21:43:56 -08:00
4d236979bd
Fix very far forward JALs
...
We were sign-extending from the wrong bit, causing a backwards jump.
2014-01-13 00:55:48 -08:00
da3135ac9b
Begin integer unit clean-up
...
...to make it easier to generate the superscalar version of the core.
2013-12-09 15:06:13 -08:00
924261e2b2
Update to new privileged ISA... phew
2013-11-25 04:35:15 -08:00
65b8340cea
Mitigate D$ hit -> branch -> NPC critical path
2013-11-24 14:21:03 -08:00
c1966e2b0a
forgot to put htif into uncore package
2013-11-07 15:42:03 -08:00
b44dafbdca
Simplify branch offset mux
2013-10-29 13:20:40 -07:00
1d2f4f8437
New ISA encoding, AUIPC semantics
2013-09-21 06:32:40 -07:00
88d1c47665
don't disassemble within chisel
2013-09-15 04:14:45 -07:00
f12bbc1e43
working RoCC AccumulatorExample
2013-09-14 22:34:53 -07:00
18968dfbc7
Move store data generation into cache
2013-09-14 16:15:07 -07:00
a0cb711451
Start adding RoCC
2013-09-14 15:31:50 -07:00
d053bdc89f
Remove Hwacha from Rocket
...
Soon it will use the coprocessor interface.
2013-09-12 22:34:38 -07:00
243c4ae342
sync up rocket with new isa
2013-09-12 03:44:38 -07:00
67f80ba4b2
Stall div/mul writeback until WB slot is free
2013-08-24 14:44:17 -07:00
52e31f3298
Bypass scoreboard updates
...
This reduces div/mul/D$ miss latency by 1 cycle.
2013-08-24 14:44:04 -07:00
d4a0db4575
Reflect ISA changes
2013-08-24 14:43:55 -07:00
3a266cbbfa
final Reg changes
2013-08-15 15:28:15 -07:00
1a9e43aa11
initial attempt at upgrade
2013-08-12 10:39:11 -07:00
4eaab214d2
Fold uncore constants into TileLinkConfiguration, update coherence API
2013-08-02 16:29:51 -07:00
9abdf4e154
Make compatible with scala 2.10. List.sort deprecated. Refactor constants into package object.
2013-07-23 20:27:58 -07:00
95c5147dc5
Add RISC-V instruction disassembler
2013-06-13 10:31:04 -07:00
50ccc20bf3
replace RDNPC with AUIPC
2013-04-22 04:20:15 -07:00
8cbdeb2abf
add LR/SC support
2013-04-04 17:07:09 -07:00
8b439ef20d
only support setpcr/clearpcr of SR
...
the full PCR RMW support was wasted area/power
2013-04-04 17:07:08 -07:00
6d2541aced
nTiles -> nClients in LogicalNetworkConfig
2013-03-20 14:12:36 -07:00
e1225c5114
standardize IO naming convention
2013-01-07 13:41:36 -08:00
78868f6075
add config option to trade mul/div area for speed
2013-01-06 03:47:17 -08:00
05f19b21d0
merge multiplier and divider
2012-12-12 02:22:47 -08:00
4608660f6e
torture revealed a couple bugs
...
FP loads/stores with certain negative offsets could cause illegal rounding
mode traps, and x's were cropping up in situations that are benign in HW.
2012-12-04 05:57:53 -08:00
9c857b83f0
refactor PCR file
2012-11-27 01:28:06 -08:00
352bb464b5
clock gate X/M and M/W store data registers
2012-11-26 20:33:41 -08:00
de2f28193a
get rid of more global constants
2012-11-25 04:24:25 -08:00
c036cdc1ea
add option for 2-cycle load-use delay
2012-11-24 22:01:08 -08:00
72f94d1141
fix virtual address sign extension detection
2012-11-20 04:06:57 -08:00
29bc361d6c
remove global constants; disentangle hwacha a bit
2012-11-17 17:24:08 -08:00
