sync up rocket with new isa
This commit is contained in:
Andrew Waterman
parent
95dd0d8be1
commit
243c4ae342
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@ -16,32 +16,36 @@ trait ScalarOpConstants {
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val BR_LTU = Bits(6, 3)
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val BR_GEU = Bits(7, 3)
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val PC_EX4 = UInt(0, 2)
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val PC_EX = UInt(1, 2)
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val PC_EX = UInt(0, 2)
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val PC_WB = UInt(2, 2)
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val PC_PCR = UInt(3, 2)
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val A2_X = Bits("b???", 3)
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val A2_BTYPE = UInt(0, 3);
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val A2_LTYPE = UInt(1, 3);
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val A2_ITYPE = UInt(2, 3);
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val A2_ZERO = UInt(4, 3);
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val A2_JTYPE = UInt(5, 3);
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val A2_RTYPE = UInt(6, 3);
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val A1_X = Bits("b??", 2)
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val A1_RS1 = UInt(0, 2)
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val A1_PC = UInt(1, 2)
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val A1_ZERO = UInt(2, 2)
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val IMM_X = Bits("b???", 3)
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val IMM_S = UInt(0, 3);
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val IMM_SB = UInt(1, 3);
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val IMM_U = UInt(2, 3);
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val IMM_UJ = UInt(3, 3);
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val IMM_I = UInt(4, 3);
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val A2_X = Bits("b??", 2)
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val A2_RS2 = UInt(0, 2)
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val A2_IMM = UInt(1, 2)
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val A2_ZERO = UInt(2, 3)
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val A2_FOUR = UInt(3, 3)
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val X = Bits("b?", 1)
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val N = Bits(0, 1)
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val Y = Bits(1, 1)
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val WA_X = UInt("b?", 1)
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val WA_RD = UInt(0, 1)
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val WA_RA = UInt(1, 1)
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val WB_X = UInt("b???", 3)
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val WB_PC = UInt(0, 3);
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val WB_ALU = UInt(2, 3);
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val WB_TSC = UInt(4, 3);
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val WB_IRT = UInt(5, 3);
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val WB_X = UInt("b??", 2)
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val WB_ALU = UInt(0, 3);
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val WB_TSC = UInt(2, 3);
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val WB_IRT = UInt(3, 3);
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val SZ_DW = 1
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val DW_X = X
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@ -14,15 +14,16 @@ class CtrlDpathIO extends Bundle()
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val killd = Bool(OUTPUT);
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val ren2 = Bool(OUTPUT);
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val ren1 = Bool(OUTPUT);
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val sel_alu2 = UInt(OUTPUT, 3);
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val fn_dw = Bool(OUTPUT);
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val fn_alu = UInt(OUTPUT, SZ_ALU_FN);
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val sel_alu2 = UInt(OUTPUT, 3)
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val sel_alu1 = UInt(OUTPUT, 2)
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val sel_imm = UInt(OUTPUT, 3)
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val fn_dw = Bool(OUTPUT)
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val fn_alu = UInt(OUTPUT, SZ_ALU_FN)
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val div_mul_val = Bool(OUTPUT)
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val div_mul_kill = Bool(OUTPUT)
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val div_val = Bool(OUTPUT);
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val div_kill = Bool(OUTPUT)
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val sel_wa = Bool(OUTPUT);
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val sel_wb = UInt(OUTPUT, 3);
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val sel_wb = UInt(OUTPUT, 2)
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val pcr = UInt(OUTPUT, 3)
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val eret = Bool(OUTPUT);
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val mem_load = Bool(OUTPUT);
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@ -31,6 +32,7 @@ class CtrlDpathIO extends Bundle()
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val mem_fp_val= Bool(OUTPUT);
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val ex_wen = Bool(OUTPUT);
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val ex_jalr = Bool(OUTPUT)
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val ex_predicted_taken = Bool(OUTPUT)
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val mem_wen = Bool(OUTPUT);
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val wb_wen = Bool(OUTPUT);
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val wb_valid = Bool(OUTPUT)
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@ -66,13 +68,13 @@ abstract trait DecodeConstants
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val xpr64 = Y;
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val decode_default =
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// fence.i
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// jalr mul_val | eret
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// fp_val | renx2 | div_val | | syscall
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// | vec_val | | renx1 mem_val | | wen pcr | | | privileged
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// val | | brtype | | | s_alu2 dw alu | mem_cmd mem_type| | | s_wa s_wb | | | | | replay_next
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// | | | | | | | | | | | | | | | | | | | | | | | |
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List(N, X,X,BR_X, X,X,X,A2_X, DW_X, FN_X, N,M_X, MT_X, X,X,X,WA_X, WB_X, PCR.X,N,X,X,X,X)
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// fence.i
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// jalr mul_val | eret
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// fp_val | renx2 | div_val | | syscall
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// | vec_val | | renx1 s_alu1 mem_val | | wen pcr | | | privileged
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// val | | brtype | | | s_alu2 | imm dw alu | mem_cmd mem_type| | | s_wb | | | | | replay_next
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// | | | | | | | | | | | | | | | | | | | | | | | | |
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List(N, X,X,BR_X, X,X,X,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, X,X,X,WB_X, PCR.X,N,X,X,X,X)
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val table: Array[(UInt, List[UInt])]
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}
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@ -80,239 +82,238 @@ abstract trait DecodeConstants
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object XDecode extends DecodeConstants
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{
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val table = Array(
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// fence.i
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// jalr mul_val | eret
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// fp_val | renx2 | div_val | | syscall
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// | vec_val | | renx1 mem_val | | wen pcr | | | privileged
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// val | | brtype | | | s_alu2 dw alu | mem_cmd mem_type| | | s_wa s_wb | | | | | replay_next
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// | | | | | | | | | | | | | | | | | | | | | | | |
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BNE-> List(Y, N,N,BR_NE, N,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
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BEQ-> List(Y, N,N,BR_EQ, N,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
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BLT-> List(Y, N,N,BR_LT, N,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
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BLTU-> List(Y, N,N,BR_LTU,N,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
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BGE-> List(Y, N,N,BR_GE, N,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
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BGEU-> List(Y, N,N,BR_GEU,N,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
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// fence.i
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// jalr mul_val | eret
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// fp_val | renx2 | div_val | | syscall
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// | vec_val | | renx1 s_alu1 mem_val | | wen pcr | | | privileged
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// val | | brtype | | | s_alu2 | imm dw alu | mem_cmd mem_type| | | s_wb | | | | | replay_next
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// | | | | | | | | | | | | | | | | | | | | | | | | |
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BNE-> List(Y, N,N,BR_NE, N,Y,Y,A2_RS2, A1_RS1, IMM_SB,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
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BEQ-> List(Y, N,N,BR_EQ, N,Y,Y,A2_RS2, A1_RS1, IMM_SB,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
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BLT-> List(Y, N,N,BR_LT, N,Y,Y,A2_RS2, A1_RS1, IMM_SB,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
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BLTU-> List(Y, N,N,BR_LTU,N,Y,Y,A2_RS2, A1_RS1, IMM_SB,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
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BGE-> List(Y, N,N,BR_GE, N,Y,Y,A2_RS2, A1_RS1, IMM_SB,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
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BGEU-> List(Y, N,N,BR_GEU,N,Y,Y,A2_RS2, A1_RS1, IMM_SB,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
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J-> List(Y, N,N,BR_J, N,N,N,A2_JTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
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JAL-> List(Y, N,N,BR_J, N,N,N,A2_JTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,N,Y,WA_RA,WB_PC, PCR.N,N,N,N,N,N),
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JALR-> List(Y, N,N,BR_N, Y,N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WA_RD,WB_PC, PCR.N,N,N,N,N,N),
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AUIPC-> List(Y, N,N,BR_N, N,N,N,A2_LTYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,N,Y,WA_RD,WB_PC, PCR.N,N,N,N,N,N),
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JAL-> List(Y, N,N,BR_J, N,N,N,A2_FOUR,A1_PC, IMM_UJ,DW_X, FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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JALR-> List(Y, N,N,BR_N, Y,N,Y,A2_FOUR,A1_PC, IMM_I, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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AUIPC-> List(Y, N,N,BR_N, N,N,N,A2_IMM, A1_PC, IMM_U, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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LB-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_B, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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LH-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_H, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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LW-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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LD-> List(xpr64,N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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LBU-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_BU,N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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LHU-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_HU,N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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LWU-> List(xpr64,N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_WU,N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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SB-> List(Y, N,N,BR_N, N,Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_B, N,N,N,WA_X, WB_ALU,PCR.N,N,N,N,N,N),
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SH-> List(Y, N,N,BR_N, N,Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_H, N,N,N,WA_X, WB_ALU,PCR.N,N,N,N,N,N),
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SW-> List(Y, N,N,BR_N, N,Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_W, N,N,N,WA_X, WB_ALU,PCR.N,N,N,N,N,N),
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SD-> List(xpr64,N,N,BR_N, N,Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_D, N,N,N,WA_X, WB_ALU,PCR.N,N,N,N,N,N),
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LB-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_B, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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LH-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_H, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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LW-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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LD-> List(xpr64,N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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LBU-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_BU,N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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LHU-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_HU,N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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LWU-> List(xpr64,N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_WU,N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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SB-> List(Y, N,N,BR_N, N,Y,Y,A2_IMM, A1_RS1, IMM_S, DW_XPR,FN_ADD, Y,M_XWR, MT_B, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
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SH-> List(Y, N,N,BR_N, N,Y,Y,A2_IMM, A1_RS1, IMM_S, DW_XPR,FN_ADD, Y,M_XWR, MT_H, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
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SW-> List(Y, N,N,BR_N, N,Y,Y,A2_IMM, A1_RS1, IMM_S, DW_XPR,FN_ADD, Y,M_XWR, MT_W, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
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SD-> List(xpr64,N,N,BR_N, N,Y,Y,A2_IMM, A1_RS1, IMM_S, DW_XPR,FN_ADD, Y,M_XWR, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
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AMOADD_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_ADD, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOSWAP_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_SWAP,MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOAND_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_AND, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOOR_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_OR, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMIN_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MIN, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMINU_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MINU,MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMAX_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAX, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMAXU_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAXU,MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOADD_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_ADD, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOSWAP_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_SWAP,MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOAND_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_AND, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOOR_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_OR, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMIN_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MIN, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMINU_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MINU,MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMAX_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAX, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOMAXU_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAXU,MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
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AMOADD_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_ADD, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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AMOSWAP_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_SWAP,MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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AMOAND_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_AND, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
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AMOOR_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_OR, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMIN_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MIN, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMINU_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MINU,MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMAX_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MAX, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMAXU_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MAXU,MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOADD_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_ADD, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOSWAP_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_SWAP,MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOAND_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_AND, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOOR_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_OR, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMIN_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MIN, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMINU_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MINU,MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMAX_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MAX, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AMOMAXU_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XA_MAXU,MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
|
||||
LR_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XLR, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
LR_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XLR, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SC_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XSC, MT_W, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SC_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XSC, MT_D, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
LR_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XLR, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
LR_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XLR, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SC_W-> List(Y, N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XSC, MT_W, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SC_D-> List(xpr64,N,N,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, Y,M_XSC, MT_D, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
|
||||
LUI-> List(Y, N,N,BR_N, N,N,N,A2_LTYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ADDI-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLTI -> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_SLT, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLTIU-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_SLTU, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ANDI-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_AND, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ORI-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_OR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
XORI-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_XOR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLLI-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_SL, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRLI-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_SR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRAI-> List(Y, N,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_SRA, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ADD-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SUB-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_SUB, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLT-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_SLT, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLTU-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_SLTU, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AND-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_AND, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
OR-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_OR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
XOR-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_XOR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLL-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_SL, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRL-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_SR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRA-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_SRA, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
LUI-> List(Y, N,N,BR_N, N,N,N,A2_IMM, A1_ZERO,IMM_U, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ADDI-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLTI -> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_SLT, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLTIU-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_SLTU, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ANDI-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_AND, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ORI-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_OR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
XORI-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_XOR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLLI-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_SL, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRLI-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_SR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRAI-> List(Y, N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_SRA, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ADD-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SUB-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_SUB, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLT-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_SLT, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLTU-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_SLTU, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
AND-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_AND, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
OR-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_OR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
XOR-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_XOR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLL-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_SL, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRL-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_SR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRA-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_SRA, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
|
||||
ADDIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_ITYPE,DW_32,FN_ADD, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLLIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_ITYPE,DW_32,FN_SL, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRLIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_ITYPE,DW_32,FN_SR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRAIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_ITYPE,DW_32,FN_SRA, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ADDW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32,FN_ADD, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SUBW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32,FN_SUB, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLLW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32,FN_SL, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRLW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32,FN_SR, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRAW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32,FN_SRA, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ADDIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_32,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLLIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_32,FN_SL, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRLIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_32,FN_SR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRAIW-> List(xpr64,N,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_32,FN_SRA, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
ADDW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SUBW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32,FN_SUB, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SLLW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32,FN_SL, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRLW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32,FN_SR, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
SRAW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32,FN_SRA, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
|
||||
MUL-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_MUL, N,M_X, MT_X, Y,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULH-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_MULH, N,M_X, MT_X, Y,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULHU-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_MULHU, N,M_X, MT_X, Y,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULHSU-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_MULHSU,N,M_X, MT_X, Y,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32, FN_MUL, N,M_X, MT_X, Y,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
MUL-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_MUL, N,M_X, MT_X, Y,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULH-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_MULH, N,M_X, MT_X, Y,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULHU-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_MULHU, N,M_X, MT_X, Y,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULHSU-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_MULHSU,N,M_X, MT_X, Y,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
MULW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32, FN_MUL, N,M_X, MT_X, Y,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
|
||||
DIV-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_DIV, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
DIVU-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_DIVU, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
REM-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_REM, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
REMU-> List(Y, N,N,BR_N, N,Y,Y,A2_RTYPE,DW_XPR,FN_REMU, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
DIVW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32, FN_DIV, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
DIVUW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32, FN_DIVU, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
REMW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32, FN_REM, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
REMUW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RTYPE,DW_32, FN_REMU, N,M_X, MT_X, N,Y,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
DIV-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_DIV, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
DIVU-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_DIVU, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
REM-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_REM, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
REMU-> List(Y, N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_XPR,FN_REMU, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
DIVW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32, FN_DIV, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
DIVUW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32, FN_DIVU, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
REMW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32, FN_REM, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
REMUW-> List(xpr64,N,N,BR_N, N,Y,Y,A2_RS2, A1_RS1, IMM_X, DW_32, FN_REMU, N,M_X, MT_X, N,Y,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
|
||||
SYSCALL-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,Y,N,N),
|
||||
SETPCR-> List(Y, N,N,BR_N, N,N,N,A2_ITYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.S,N,N,N,Y,N),
|
||||
CLEARPCR-> List(Y, N,N,BR_N, N,N,N,A2_ITYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.C,N,N,N,Y,N),
|
||||
ERET-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,Y,N,Y,N),
|
||||
FENCE-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_X, FN_X, Y,M_FENCE, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
|
||||
FENCE_I-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_X, FN_X, Y,M_FENCE, MT_X, N,N,N,WA_X, WB_X, PCR.N,Y,N,N,N,Y),
|
||||
MFPCR-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.F,N,N,N,Y,N),
|
||||
MTPCR-> List(Y, N,N,BR_N, N,Y,N,A2_RTYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.T,N,N,N,Y,N),
|
||||
RDTIME-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_TSC,PCR.N,N,N,N,N,N),
|
||||
RDCYCLE-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_TSC,PCR.N,N,N,N,N,N),
|
||||
RDINSTRET-> List(Y, N,N,BR_N, N,N,N,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_IRT,PCR.N,N,N,N,N,N))
|
||||
SYSCALL-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,Y,N,N),
|
||||
SETPCR-> List(Y, N,N,BR_N, N,N,N,A2_IMM, A1_ZERO,IMM_I, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.S,N,N,N,Y,N),
|
||||
CLEARPCR-> List(Y, N,N,BR_N, N,N,N,A2_IMM, A1_ZERO,IMM_I, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.C,N,N,N,Y,N),
|
||||
ERET-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,Y,N,Y,N),
|
||||
FENCE-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, Y,M_FENCE, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FENCE_I-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, Y,M_FENCE, MT_X, N,N,N,WB_X, PCR.N,Y,N,N,N,Y),
|
||||
MFPCR-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.F,N,N,N,Y,N),
|
||||
MTPCR-> List(Y, N,N,BR_N, N,Y,N,A2_RS2, A1_ZERO,IMM_I, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.T,N,N,N,Y,N),
|
||||
RDTIME-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_XPR,FN_X, N,M_X, MT_X, N,N,Y,WB_TSC,PCR.N,N,N,N,N,N),
|
||||
RDCYCLE-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_XPR,FN_X, N,M_X, MT_X, N,N,Y,WB_TSC,PCR.N,N,N,N,N,N),
|
||||
RDINSTRET-> List(Y, N,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_XPR,FN_X, N,M_X, MT_X, N,N,Y,WB_IRT,PCR.N,N,N,N,N,N))
|
||||
}
|
||||
|
||||
object FDecode extends DecodeConstants
|
||||
{
|
||||
val table = Array(
|
||||
// fence.i
|
||||
// jalr mul_val | eret
|
||||
// fp_val | renx2 | div_val | | syscall
|
||||
// | vec_val | | renx1 mem_val | | wen pcr | | | privileged
|
||||
// val | | brtype | | | s_alu2 dw alu | mem_cmd mem_type| | | s_wa s_wb | | | | | replay_next
|
||||
// | | | | | | | | | | | | | | | | | | | | | | | |
|
||||
FCVT_S_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJ_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJ_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJX_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJX_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJN_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJN_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMIN_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMIN_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMAX_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMAX_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FADD_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FADD_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSUB_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSUB_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMUL_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMUL_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMADD_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMADD_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMSUB_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMSUB_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMADD_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMADD_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMSUB_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMSUB_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_X_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_X_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_W_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_W_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_WU_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_WU_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_L_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_L_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_LU_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_LU_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FEQ_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FEQ_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLT_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLT_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLE_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLE_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_S_X-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_D_X-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_W-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_W-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_WU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_WU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_L-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_L-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_LU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_LU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FRSR-> List(Y, Y,N,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSSR-> List(Y, Y,N,BR_N, N,N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLW-> List(Y, Y,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_W, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
FLD-> List(Y, Y,N,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
FSW-> List(Y, Y,N,BR_N, N,N,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_W, N,N,N,WA_X, WB_ALU,PCR.N,N,N,N,N,N),
|
||||
FSD-> List(Y, Y,N,BR_N, N,N,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_D, N,N,N,WA_X, WB_ALU,PCR.N,N,N,N,N,N))
|
||||
// fence.i
|
||||
// jalr mul_val | eret
|
||||
// fp_val | renx2 | div_val | | syscall
|
||||
// | vec_val | | renx1 s_alu1 mem_val | | wen pcr | | | privileged
|
||||
// val | | brtype | | | s_alu2 | imm dw alu | mem_cmd mem_type| | | s_wb | | | | | replay_next
|
||||
// | | | | | | | | | | | | | | | | | | | | | | | | |
|
||||
FCVT_S_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJ_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJ_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJX_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJX_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJN_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSGNJN_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMIN_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMIN_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMAX_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMAX_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FADD_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FADD_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSUB_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSUB_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMUL_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMUL_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMADD_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMADD_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMSUB_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMSUB_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMADD_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMADD_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMSUB_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FNMSUB_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_X_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_X_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_W_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_W_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_WU_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_WU_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_L_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_L_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_LU_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_LU_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FEQ_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FEQ_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLT_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLT_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLE_S-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLE_D-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_S_X-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FMV_D_X-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_W-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_W-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_WU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_WU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_L-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_L-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_S_LU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FCVT_D_LU-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FRSR-> List(Y, Y,N,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FSSR-> List(Y, Y,N,BR_N, N,N,Y,A2_X, A1_RS1, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,Y,WB_X, PCR.N,N,N,N,N,N),
|
||||
FLW-> List(Y, Y,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_W, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
FLD-> List(Y, Y,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, Y,M_XRD, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
FSW-> List(Y, Y,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_S, DW_XPR,FN_ADD, Y,M_XWR, MT_W, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
FSD-> List(Y, Y,N,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_S, DW_XPR,FN_ADD, Y,M_XWR, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N))
|
||||
}
|
||||
|
||||
object VDecode extends DecodeConstants
|
||||
{
|
||||
val table = Array(
|
||||
// fence.i
|
||||
// jalr mul_val | eret
|
||||
// fp_val | renx2 | div_val | | syscall
|
||||
// | vec_val | | renx1 mem_val | | wen pcr | | | privileged
|
||||
// val | | brtype | | | s_alu2 dw alu | mem_cmd mem_type| | | s_wa s_wb | | | | | replay_next
|
||||
// | | | | | | | | | | | | | | | | | | | | | | | |
|
||||
VSETCFGVL-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,Y),
|
||||
VSETVL-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WA_RD,WB_ALU,PCR.N,N,N,N,N,Y),
|
||||
VF-> List(Y, N,Y,BR_N, N,N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_X, WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VMVV-> List(Y, N,Y,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_RD,WB_X, PCR.N,N,N,N,N,N),
|
||||
FENCE_V_L-> List(Y, N,Y,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
|
||||
FENCE_V_G-> List(Y, N,Y,BR_N, N,N,N,A2_X, DW_X, FN_X, Y,M_FENCE, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,N,N),
|
||||
VLD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLWU-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLH-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLHU-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLB-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLBU-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSH-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSB-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTWU-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTH-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTHU-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTB-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTBU-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTH-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTB-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
// fence.i
|
||||
// jalr mul_val | eret
|
||||
// fp_val | renx2 | div_val | | syscall
|
||||
// | vec_val | | renx1 s_alu1 mem_val | | wen pcr | | | privileged
|
||||
// val | | brtype | | | s_alu2 | imm dw alu | mem_cmd mem_type| | | s_wb | | | | | replay_next
|
||||
// | | | | | | | | | | | | | | | | | | | | | | | | |
|
||||
VSETCFGVL-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,Y),
|
||||
VSETVL-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,Y,WB_ALU,PCR.N,N,N,N,N,Y),
|
||||
VF-> List(Y, N,Y,BR_N, N,N,Y,A2_IMM, A1_RS1, IMM_I, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VMVV-> List(Y, N,Y,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FENCE_V_L-> List(Y, N,Y,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
FENCE_V_G-> List(Y, N,Y,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, Y,M_FENCE, MT_X, N,N,N,WB_X, PCR.N,N,N,N,N,N),
|
||||
VLD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLWU-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLH-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLHU-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLB-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLBU-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSH-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSB-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSD-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSW-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTWU-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTH-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTHU-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTB-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VLSTBU-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTH-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VSSTB-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFLSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSSTD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
VFSSTW-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_D, N,N,N,WB_ALU,PCR.N,N,N,N,N,N),
|
||||
|
||||
VENQCMD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VENQIMM1-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VENQIMM2-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VENQCNT-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VXCPTEVAC-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WA_RD,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VXCPTKILL-> List(Y, N,Y,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,Y,N),
|
||||
VXCPTHOLD-> List(Y, N,Y,BR_N, N,N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WA_X, WB_X, PCR.N,N,N,N,Y,N))
|
||||
VENQCMD-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VENQIMM1-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VENQIMM2-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VENQCNT-> List(Y, N,Y,BR_N, N,Y,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VXCPTEVAC-> List(Y, N,Y,BR_N, N,N,Y,A2_ZERO,A1_RS1, IMM_X, DW_XPR,FN_ADD, N,M_X, MT_X, N,N,N,WB_ALU,PCR.N,N,N,N,Y,N),
|
||||
VXCPTKILL-> List(Y, N,Y,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,Y,N),
|
||||
VXCPTHOLD-> List(Y, N,Y,BR_N, N,N,N,A2_X, A1_X, IMM_X, DW_X, FN_X, N,M_X, MT_X, N,N,N,WB_X, PCR.N,N,N,N,Y,N))
|
||||
}
|
||||
|
||||
class Control(implicit conf: RocketConfiguration) extends Module
|
||||
|
|
@ -342,14 +343,15 @@ class Control(implicit conf: RocketConfiguration) extends Module
|
|||
case u => u
|
||||
}
|
||||
|
||||
val (id_int_val: Bool) :: (id_fp_val: Bool) :: (id_vec_val: Bool) :: id_br_type :: (id_jalr: Bool) :: (id_renx2: Bool) :: (id_renx1: Bool) :: id_sel_alu2 :: (id_fn_dw: Bool) :: id_fn_alu :: cs0 = cs
|
||||
val (id_mem_val: Bool) :: id_mem_cmd :: id_mem_type :: (id_mul_val: Bool) :: (id_div_val: Bool) :: (id_wen: Bool) :: id_sel_wa :: id_sel_wb :: cs1 = cs0
|
||||
val id_pcr :: (id_fence_i: Bool) :: (id_eret: Bool) :: (id_syscall: Bool) :: (id_privileged: Bool) :: (id_replay_next: Bool) :: Nil = cs1
|
||||
val (id_int_val: Bool) :: (id_fp_val: Bool) :: (id_vec_val: Bool) :: id_br_type :: (id_jalr: Bool) :: (id_renx2: Bool) :: (id_renx1: Bool) :: cs0 = cs
|
||||
val id_sel_alu2 :: id_sel_alu1 :: id_sel_imm :: (id_fn_dw: Bool) :: id_fn_alu :: cs1 = cs0
|
||||
val (id_mem_val: Bool) :: id_mem_cmd :: id_mem_type :: (id_mul_val: Bool) :: (id_div_val: Bool) :: (id_wen: Bool) :: id_sel_wb :: cs2 = cs1
|
||||
val id_pcr :: (id_fence_i: Bool) :: (id_eret: Bool) :: (id_syscall: Bool) :: (id_privileged: Bool) :: (id_replay_next: Bool) :: Nil = cs2
|
||||
|
||||
val id_raddr3 = io.dpath.inst(16,12);
|
||||
val id_raddr2 = io.dpath.inst(21,17);
|
||||
val id_raddr1 = io.dpath.inst(26,22);
|
||||
val id_waddr = Mux(id_sel_wa === WA_RA, RA, io.dpath.inst(31,27));
|
||||
val id_raddr3 = io.dpath.inst(16,12)
|
||||
val id_raddr2 = io.dpath.inst(21,17)
|
||||
val id_raddr1 = io.dpath.inst(26,22)
|
||||
val id_waddr = io.dpath.inst(31,27)
|
||||
val id_load_use = Bool();
|
||||
|
||||
val ex_reg_xcpt_interrupt = Reg(init=Bool(false))
|
||||
|
|
@ -656,9 +658,7 @@ class Control(implicit conf: RocketConfiguration) extends Module
|
|||
Mux(wb_reg_xcpt, PC_PCR, // exception
|
||||
Mux(wb_reg_eret, PC_PCR, // eret instruction
|
||||
Mux(replay_wb, PC_WB, // replay
|
||||
Mux(ex_reg_jalr, PC_EX, // JALR
|
||||
Mux(!ex_reg_btb_hit, PC_EX, // mispredicted taken branch
|
||||
PC_EX4))))) // mispredicted not taken branch
|
||||
PC_EX)))// branch/jal[r]
|
||||
|
||||
io.imem.req.bits.mispredict := !take_pc_wb && take_pc_ex && !ex_reg_xcpt
|
||||
io.imem.req.bits.taken := !ex_reg_btb_hit || ex_reg_jalr
|
||||
|
|
@ -731,6 +731,8 @@ class Control(implicit conf: RocketConfiguration) extends Module
|
|||
io.dpath.ren2 := id_renx2.toBool;
|
||||
io.dpath.ren1 := id_renx1.toBool;
|
||||
io.dpath.sel_alu2 := id_sel_alu2.toUInt
|
||||
io.dpath.sel_alu1 := id_sel_alu1.toUInt
|
||||
io.dpath.sel_imm := id_sel_imm.toUInt
|
||||
io.dpath.fn_dw := id_fn_dw.toBool;
|
||||
io.dpath.fn_alu := id_fn_alu.toUInt
|
||||
io.dpath.div_mul_val := ex_reg_div_mul_val
|
||||
|
|
@ -738,11 +740,11 @@ class Control(implicit conf: RocketConfiguration) extends Module
|
|||
io.dpath.ex_fp_val:= ex_reg_fp_val;
|
||||
io.dpath.mem_fp_val:= mem_reg_fp_val;
|
||||
io.dpath.ex_jalr := ex_reg_jalr
|
||||
io.dpath.ex_predicted_taken := ex_reg_btb_hit
|
||||
io.dpath.ex_wen := ex_reg_wen;
|
||||
io.dpath.mem_wen := mem_reg_wen;
|
||||
io.dpath.wb_wen := wb_reg_wen && !replay_wb
|
||||
io.dpath.wb_valid := wb_reg_valid && !replay_wb
|
||||
io.dpath.sel_wa := id_sel_wa.toBool;
|
||||
io.dpath.sel_wb := id_sel_wb.toUInt
|
||||
io.dpath.pcr := wb_reg_pcr.toUInt
|
||||
io.dpath.eret := wb_reg_eret
|
||||
|
|
|
|||
|
|
@ -22,10 +22,11 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
// execute definitions
|
||||
val ex_reg_pc = Reg(UInt())
|
||||
val ex_reg_inst = Reg(Bits())
|
||||
val ex_reg_waddr = Reg(UInt())
|
||||
val ex_reg_ctrl_fn_dw = Reg(UInt())
|
||||
val ex_reg_ctrl_fn_alu = Reg(UInt())
|
||||
val ex_reg_sel_alu2 = Reg(UInt())
|
||||
val ex_reg_sel_alu1 = Reg(UInt())
|
||||
val ex_reg_sel_imm = Reg(UInt())
|
||||
val ex_reg_ctrl_sel_wb = Reg(UInt())
|
||||
val ex_reg_kill = Reg(Bool())
|
||||
val ex_reg_rs1_bypass = Reg(Bool())
|
||||
|
|
@ -38,7 +39,6 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
// memory definitions
|
||||
val mem_reg_pc = Reg(UInt())
|
||||
val mem_reg_inst = Reg(Bits())
|
||||
val mem_reg_waddr = Reg(UInt())
|
||||
val mem_reg_wdata = Reg(Bits())
|
||||
val mem_reg_kill = Reg(Bool())
|
||||
val mem_reg_store_data = Reg(Bits())
|
||||
|
|
@ -70,30 +70,33 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
|
||||
// bypass muxes
|
||||
val id_rs1_zero = id_raddr1 === UInt(0)
|
||||
val id_rs1_ex_bypass = io.ctrl.ex_wen && id_raddr1 === ex_reg_waddr
|
||||
val id_rs1_mem_bypass = io.ctrl.mem_wen && id_raddr1 === mem_reg_waddr
|
||||
val id_rs1_ex_bypass = io.ctrl.ex_wen && id_raddr1 === io.ctrl.ex_waddr
|
||||
val id_rs1_mem_bypass = io.ctrl.mem_wen && id_raddr1 === io.ctrl.mem_waddr
|
||||
val id_rs1_bypass = id_rs1_zero || id_rs1_ex_bypass || id_rs1_mem_bypass || io.ctrl.mem_ll_bypass_rs1
|
||||
val id_rs1_bypass_src = Mux(id_rs1_zero, UInt(0), Mux(id_rs1_ex_bypass, UInt(1), Mux(io.ctrl.mem_load, UInt(3), UInt(2))))
|
||||
val id_rs1 = Mux(wb_wen && id_raddr1 === wb_reg_waddr, wb_wdata, readRF(id_raddr1))
|
||||
|
||||
val id_rs2_zero = id_raddr2 === UInt(0)
|
||||
val id_rs2_ex_bypass = io.ctrl.ex_wen && id_raddr2 === ex_reg_waddr
|
||||
val id_rs2_mem_bypass = io.ctrl.mem_wen && id_raddr2 === mem_reg_waddr
|
||||
val id_rs2_ex_bypass = io.ctrl.ex_wen && id_raddr2 === io.ctrl.ex_waddr
|
||||
val id_rs2_mem_bypass = io.ctrl.mem_wen && id_raddr2 === io.ctrl.mem_waddr
|
||||
val id_rs2_bypass = id_rs2_zero || id_rs2_ex_bypass || id_rs2_mem_bypass || io.ctrl.mem_ll_bypass_rs2
|
||||
val id_rs2_bypass_src = Mux(id_rs2_zero, UInt(0), Mux(id_rs2_ex_bypass, UInt(1), Mux(io.ctrl.mem_load, UInt(3), UInt(2))))
|
||||
val id_rs2 = Mux(wb_wen && id_raddr2 === wb_reg_waddr, wb_wdata, readRF(id_raddr2))
|
||||
|
||||
// immediate generation
|
||||
def imm(sel: Bits, inst: Bits) = {
|
||||
val lsbs = Mux(sel === A2_LTYPE || sel === A2_ZERO, Bits(0),
|
||||
Mux(sel === A2_BTYPE, Cat(inst(31,27), inst(16,10)),
|
||||
Mux(sel === A2_JTYPE, inst(18,7),
|
||||
inst(21,10))))
|
||||
val msbs = Mux(sel === A2_ZERO, SInt(0),
|
||||
Mux(sel === A2_LTYPE, inst(26,7).toSInt,
|
||||
Mux(sel === A2_JTYPE, inst(31,19).toSInt,
|
||||
Mux(sel === A2_ITYPE, inst(21), inst(31)).toSInt)))
|
||||
Cat(msbs, lsbs).toSInt
|
||||
val sign = inst(10).toSInt
|
||||
val b30_20 = Mux(sel === IMM_U, inst(21,11).toSInt, sign)
|
||||
val b19_12 = Mux(sel != IMM_U && sel != IMM_UJ, sign,
|
||||
Cat(inst(9,7), inst(26,22)).toSInt)
|
||||
val b11 = Mux(sel === IMM_U, SInt(0),
|
||||
Mux(sel === IMM_SB || sel === IMM_UJ, inst(11).toSInt, sign))
|
||||
val b10_6 = Mux(sel === IMM_S || sel === IMM_SB, inst(31,27),
|
||||
Mux(sel === IMM_U, Bits(0), inst(21,17)))
|
||||
val b5_1 = Mux(sel === IMM_U, Bits(0), inst(16,12))
|
||||
val b0 = Mux(sel === IMM_I || sel === IMM_S, inst(11), Bits(0))
|
||||
|
||||
Cat(sign, b30_20, b19_12, b11, b10_6, b5_1, b0).toSInt
|
||||
}
|
||||
|
||||
io.ctrl.inst := id_inst
|
||||
|
|
@ -104,13 +107,15 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
when (!io.ctrl.killd) {
|
||||
ex_reg_pc := id_pc
|
||||
ex_reg_inst := id_inst
|
||||
ex_reg_waddr := Mux(io.ctrl.sel_wa === WA_RD, id_inst(31,27).toUInt, RA)
|
||||
ex_reg_ctrl_fn_dw := io.ctrl.fn_dw.toUInt
|
||||
ex_reg_ctrl_fn_alu := io.ctrl.fn_alu
|
||||
ex_reg_sel_alu2 := io.ctrl.sel_alu2
|
||||
ex_reg_sel_alu1 := io.ctrl.sel_alu1
|
||||
ex_reg_sel_imm := io.ctrl.sel_imm
|
||||
ex_reg_ctrl_sel_wb := io.ctrl.sel_wb
|
||||
ex_reg_rs1_bypass := id_rs1_bypass && io.ctrl.ren1
|
||||
ex_reg_rs2_bypass := id_rs2_bypass && io.ctrl.ren2
|
||||
when (io.ctrl.ren1) {
|
||||
ex_reg_rs1_bypass := id_rs1_bypass
|
||||
ex_reg_rs1_lsb := id_rs1_bypass_src
|
||||
when (!id_rs1_bypass) {
|
||||
ex_reg_rs1_lsb := id_rs1(id_rs1_bypass_src.getWidth-1,0)
|
||||
|
|
@ -118,7 +123,6 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
}
|
||||
}
|
||||
when (io.ctrl.ren2) {
|
||||
ex_reg_rs2_bypass := id_rs2_bypass
|
||||
ex_reg_rs2_lsb := id_rs2_bypass_src
|
||||
when (!id_rs2_bypass) {
|
||||
ex_reg_rs2_lsb := id_rs2(id_rs2_bypass_src.getWidth-1,0)
|
||||
|
|
@ -136,21 +140,27 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
Mux(ex_reg_rs1_bypass && ex_reg_rs1_lsb === UInt(2), wb_reg_wdata,
|
||||
Mux(ex_reg_rs1_bypass && ex_reg_rs1_lsb === UInt(1), mem_reg_wdata,
|
||||
Mux(ex_reg_rs1_bypass && ex_reg_rs1_lsb === UInt(0), Bits(0),
|
||||
Cat(ex_reg_rs1_msb, ex_reg_rs1_lsb)))))
|
||||
Mux(ex_reg_sel_alu1 === A1_ZERO, Bits(0),
|
||||
Cat(ex_reg_rs1_msb, ex_reg_rs1_lsb))))))
|
||||
val ex_rs2 =
|
||||
Mux(ex_reg_rs2_bypass && ex_reg_rs2_lsb === UInt(3) && Bool(conf.fastLoadWord), dmem_resp_data,
|
||||
Mux(ex_reg_rs2_bypass && ex_reg_rs2_lsb === UInt(2), wb_reg_wdata,
|
||||
Mux(ex_reg_rs2_bypass && ex_reg_rs2_lsb === UInt(1), mem_reg_wdata,
|
||||
Mux(ex_reg_rs2_bypass && ex_reg_rs2_lsb === UInt(0), Bits(0),
|
||||
Cat(ex_reg_rs2_msb, ex_reg_rs2_lsb)))))
|
||||
val ex_imm = imm(ex_reg_sel_alu2, ex_reg_inst)
|
||||
val ex_op2 = Mux(ex_reg_sel_alu2 != A2_RTYPE, ex_imm, ex_rs2)
|
||||
|
||||
val ex_imm = imm(ex_reg_sel_imm, ex_reg_inst)
|
||||
val ex_op1 = Mux(ex_reg_sel_alu1 === A1_PC, ex_reg_pc.toSInt, ex_rs1)
|
||||
val ex_op2 = Mux(ex_reg_sel_alu2 === A2_RS2, ex_rs2.toSInt,
|
||||
Mux(ex_reg_sel_alu2 === A2_IMM, ex_imm,
|
||||
Mux(ex_reg_sel_alu2 === A2_ZERO, SInt(0),
|
||||
SInt(4))))
|
||||
|
||||
val alu = Module(new ALU)
|
||||
alu.io.dw := ex_reg_ctrl_fn_dw;
|
||||
alu.io.fn := ex_reg_ctrl_fn_alu;
|
||||
alu.io.in2 := ex_op2.toUInt
|
||||
alu.io.in1 := ex_rs1.toUInt
|
||||
alu.io.in1 := ex_op1.toUInt
|
||||
|
||||
// multiplier and divider
|
||||
val div = Module(new MulDiv(mulUnroll = if (conf.fastMulDiv) 8 else 1,
|
||||
|
|
@ -160,13 +170,13 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
div.io.req.bits.fn := ex_reg_ctrl_fn_alu
|
||||
div.io.req.bits.in1 := ex_rs1
|
||||
div.io.req.bits.in2 := ex_rs2
|
||||
div.io.req.bits.tag := ex_reg_waddr
|
||||
div.io.req.bits.tag := io.ctrl.ex_waddr
|
||||
div.io.kill := io.ctrl.div_mul_kill
|
||||
div.io.resp.ready := !io.ctrl.mem_wen
|
||||
io.ctrl.div_mul_rdy := div.io.req.ready
|
||||
|
||||
io.fpu.fromint_data := ex_rs1
|
||||
io.ctrl.ex_waddr := ex_reg_waddr
|
||||
io.ctrl.ex_waddr := ex_reg_inst(31,27)
|
||||
|
||||
def vaSign(a0: UInt, ea: Bits) = {
|
||||
// efficient means to compress 64-bit VA into VADDR_BITS+1 bits
|
||||
|
|
@ -177,13 +187,17 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
Mux(a === SInt(-1) || a === SInt(-2), e === SInt(-1),
|
||||
e(0)))
|
||||
}
|
||||
val ex_effective_address = Cat(vaSign(ex_rs1, alu.io.adder_out), alu.io.adder_out(VADDR_BITS-1,0)).toUInt
|
||||
val ex_br_base = Mux(io.ctrl.ex_jalr, ex_rs1, ex_reg_pc)
|
||||
val ex_br_offset = Mux(io.ctrl.ex_predicted_taken && !io.ctrl.ex_jalr, SInt(4), ex_imm)
|
||||
val ex_br64 = ex_br_base + ex_br_offset
|
||||
val ex_br_msb = Mux(io.ctrl.ex_jalr, vaSign(ex_rs1, ex_br64), vaSign(ex_reg_pc, ex_br64))
|
||||
val ex_br_addr = Cat(ex_br_msb, ex_br64(VADDR_BITS-1,0))
|
||||
|
||||
// D$ request interface (registered inside D$ module)
|
||||
// other signals (req_val, req_rdy) connect to control module
|
||||
io.dmem.req.bits.addr := ex_effective_address
|
||||
io.dmem.req.bits.addr := Cat(vaSign(ex_rs1, alu.io.adder_out), alu.io.adder_out(VADDR_BITS-1,0)).toUInt
|
||||
io.dmem.req.bits.data := Mux(io.ctrl.mem_fp_val, io.fpu.store_data, mem_reg_store_data)
|
||||
io.dmem.req.bits.tag := Cat(ex_reg_waddr, io.ctrl.ex_fp_val)
|
||||
io.dmem.req.bits.tag := Cat(io.ctrl.ex_waddr, io.ctrl.ex_fp_val)
|
||||
require(io.dmem.req.bits.tag.getWidth >= 6)
|
||||
|
||||
// processor control regfile read
|
||||
|
|
@ -209,26 +223,20 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
Mux(io.ctrl.ex_br_type === BR_GEU, ex_rs1 >= ex_rs2,
|
||||
io.ctrl.ex_br_type === BR_J))))))
|
||||
|
||||
val ex_pc_plus4 = ex_reg_pc.toSInt + Mux(ex_reg_sel_alu2 === A2_LTYPE, ex_reg_inst(26,7).toSInt << 12, SInt(4))
|
||||
val ex_branch_target = ex_reg_pc.toSInt + (ex_imm << 1)
|
||||
val ex_jalr_target = (ex_effective_address >> 1 << 1).toSInt
|
||||
|
||||
val tsc_reg = WideCounter(64)
|
||||
val irt_reg = WideCounter(64, io.ctrl.wb_valid)
|
||||
|
||||
// writeback select mux
|
||||
val ex_wdata =
|
||||
Mux(ex_reg_ctrl_sel_wb === WB_PC, ex_pc_plus4,
|
||||
Mux(ex_reg_ctrl_sel_wb === WB_TSC, tsc_reg.value,
|
||||
Mux(ex_reg_ctrl_sel_wb === WB_IRT, irt_reg.value,
|
||||
alu.io.out))).toBits // WB_ALU
|
||||
alu.io.out)).toBits // WB_ALU
|
||||
|
||||
// memory stage
|
||||
mem_reg_kill := ex_reg_kill
|
||||
when (!ex_reg_kill) {
|
||||
mem_reg_pc := ex_reg_pc
|
||||
mem_reg_inst := ex_reg_inst
|
||||
mem_reg_waddr := ex_reg_waddr
|
||||
mem_reg_wdata := ex_wdata
|
||||
mem_reg_rs1 := ex_rs1
|
||||
mem_reg_rs2 := ex_rs2
|
||||
|
|
@ -238,7 +246,7 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
}
|
||||
|
||||
// for load/use hazard detection (load byte/halfword)
|
||||
io.ctrl.mem_waddr := mem_reg_waddr;
|
||||
io.ctrl.mem_waddr := mem_reg_inst(31,27)
|
||||
|
||||
// writeback arbitration
|
||||
val dmem_resp_xpu = !io.dmem.resp.bits.tag(0).toBool
|
||||
|
|
@ -266,8 +274,8 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
// writeback stage
|
||||
when (!mem_reg_kill) {
|
||||
wb_reg_pc := mem_reg_pc
|
||||
wb_reg_waddr := io.ctrl.mem_waddr
|
||||
wb_reg_inst := mem_reg_inst
|
||||
wb_reg_waddr := mem_reg_waddr
|
||||
wb_reg_wdata := Mux(io.ctrl.mem_fp_val && io.ctrl.mem_wen, io.fpu.toint_data, mem_reg_wdata)
|
||||
wb_reg_rs1 := mem_reg_rs1
|
||||
wb_reg_rs2 := mem_reg_rs2
|
||||
|
|
@ -322,10 +330,9 @@ class Datapath(implicit conf: RocketConfiguration) extends Module
|
|||
// hook up I$
|
||||
io.imem.req.bits.currentpc := ex_reg_pc
|
||||
io.imem.req.bits.pc :=
|
||||
Mux(io.ctrl.sel_pc === PC_EX4, ex_pc_plus4,
|
||||
Mux(io.ctrl.sel_pc === PC_EX, Mux(io.ctrl.ex_jalr, ex_jalr_target, ex_branch_target),
|
||||
Mux(io.ctrl.sel_pc === PC_EX, ex_br_addr,
|
||||
Mux(io.ctrl.sel_pc === PC_PCR, pcr.io.evec,
|
||||
wb_reg_pc))).toUInt // PC_WB
|
||||
wb_reg_pc)).toUInt // PC_WB
|
||||
|
||||
printf("C: %d [%d] pc=[%x] W[r%d=%x] R[r%d=%x] R[r%d=%x] inst=[%x] %s\n",
|
||||
tsc_reg(32,0), io.ctrl.wb_valid, wb_reg_pc,
|
||||
|
|
|
|||
|
|
@ -18,7 +18,6 @@ object ALU
|
|||
val FN_SLT = Bits(10)
|
||||
val FN_SLTU = Bits(11)
|
||||
val FN_SRA = Bits(13)
|
||||
val FN_OP2 = Bits(15)
|
||||
|
||||
val FN_DIV = FN_XOR
|
||||
val FN_DIVU = FN_SR
|
||||
|
|
@ -65,18 +64,14 @@ class ALU(implicit conf: RocketConfiguration) extends Module
|
|||
val shout_r = (Cat(isSub(io.fn) & shin(63), shin).toSInt >> shamt)(63,0)
|
||||
val shout_l = Reverse(shout_r)
|
||||
|
||||
val bitwise_logic =
|
||||
Mux(io.fn === FN_AND, io.in1 & io.in2,
|
||||
Mux(io.fn === FN_OR, io.in1 | io.in2,
|
||||
Mux(io.fn === FN_XOR, io.in1 ^ io.in2,
|
||||
io.in2))) // FN_OP2
|
||||
|
||||
val out64 =
|
||||
Mux(io.fn === FN_ADD || io.fn === FN_SUB, sum,
|
||||
Mux(io.fn === FN_SLT || io.fn === FN_SLTU, less,
|
||||
Mux(io.fn === FN_SR || io.fn === FN_SRA, shout_r,
|
||||
Mux(io.fn === FN_SL, shout_l,
|
||||
bitwise_logic))))
|
||||
Mux(io.fn === FN_AND, io.in1 & io.in2,
|
||||
Mux(io.fn === FN_OR, io.in1 | io.in2,
|
||||
/*FN_XOR*/ io.in1 ^ io.in2))))))
|
||||
|
||||
val out_hi = Mux(io.dw === DW_64, out64(63,32), Fill(32, out64(31)))
|
||||
io.out := Cat(out_hi, out64(31,0)).toUInt
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@ import Node._
|
|||
object Instructions
|
||||
{
|
||||
/* Automatically generated by parse-opcodes */
|
||||
def J = Bits("b?????????????????????????1101011")
|
||||
def JAL = Bits("b?????????????????????????1101111")
|
||||
def JALR = Bits("b??????????????????????0001100111")
|
||||
def BEQ = Bits("b??????????????????????0001100011")
|
||||
|
|
@ -18,12 +17,12 @@ object Instructions
|
|||
def LUI = Bits("b?????????????????????????0110111")
|
||||
def AUIPC = Bits("b?????????????????????????0010111")
|
||||
def ADDI = Bits("b??????????????????????0000010011")
|
||||
def SLLI = Bits("b??????????000000??????0010010011")
|
||||
def SLLI = Bits("b??????????00000??????00010010011")
|
||||
def SLTI = Bits("b??????????????????????0100010011")
|
||||
def SLTIU = Bits("b??????????????????????0110010011")
|
||||
def XORI = Bits("b??????????????????????1000010011")
|
||||
def SRLI = Bits("b??????????000000??????1010010011")
|
||||
def SRAI = Bits("b??????????000001??????1010010011")
|
||||
def SRLI = Bits("b??????????00000??????01010010011")
|
||||
def SRAI = Bits("b??????????00000??????11010010011")
|
||||
def ORI = Bits("b??????????????????????1100010011")
|
||||
def ANDI = Bits("b??????????????????????1110010011")
|
||||
def ADD = Bits("b???????????????00000000000110011")
|
||||
|
|
@ -45,9 +44,9 @@ object Instructions
|
|||
def REM = Bits("b???????????????00000011100110011")
|
||||
def REMU = Bits("b???????????????00000011110110011")
|
||||
def ADDIW = Bits("b??????????????????????0000011011")
|
||||
def SLLIW = Bits("b??????????0000000?????0010011011")
|
||||
def SRLIW = Bits("b??????????0000000?????1010011011")
|
||||
def SRAIW = Bits("b??????????0000010?????1010011011")
|
||||
def SLLIW = Bits("b??????????000000?????00010011011")
|
||||
def SRLIW = Bits("b??????????000000?????01010011011")
|
||||
def SRAIW = Bits("b??????????000000?????11010011011")
|
||||
def ADDW = Bits("b???????????????00000000000111011")
|
||||
def SUBW = Bits("b???????????????10000000000111011")
|
||||
def SLLW = Bits("b???????????????00000000010111011")
|
||||
|
|
@ -69,30 +68,32 @@ object Instructions
|
|||
def SH = Bits("b??????????????????????0010100011")
|
||||
def SW = Bits("b??????????????????????0100100011")
|
||||
def SD = Bits("b??????????????????????0110100011")
|
||||
def AMOADD_W = Bits("b???????????????00000000100101011")
|
||||
def AMOSWAP_W = Bits("b???????????????00000010100101011")
|
||||
def AMOAND_W = Bits("b???????????????00000100100101011")
|
||||
def AMOOR_W = Bits("b???????????????00000110100101011")
|
||||
def AMOMIN_W = Bits("b???????????????00001000100101011")
|
||||
def AMOMAX_W = Bits("b???????????????00001010100101011")
|
||||
def AMOMINU_W = Bits("b???????????????00001100100101011")
|
||||
def AMOMAXU_W = Bits("b???????????????00001110100101011")
|
||||
def AMOADD_D = Bits("b???????????????00000000110101011")
|
||||
def AMOSWAP_D = Bits("b???????????????00000010110101011")
|
||||
def AMOAND_D = Bits("b???????????????00000100110101011")
|
||||
def AMOOR_D = Bits("b???????????????00000110110101011")
|
||||
def AMOMIN_D = Bits("b???????????????00001000110101011")
|
||||
def AMOMAX_D = Bits("b???????????????00001010110101011")
|
||||
def AMOMINU_D = Bits("b???????????????00001100110101011")
|
||||
def AMOMAXU_D = Bits("b???????????????00001110110101011")
|
||||
def LR_W = Bits("b??????????0000010000000100101011")
|
||||
def LR_D = Bits("b??????????0000010000000110101011")
|
||||
def SC_W = Bits("b???????????????10000010100101011")
|
||||
def SC_D = Bits("b???????????????10000010110101011")
|
||||
def FENCE_I = Bits("b??????????????????????0010101111")
|
||||
def FENCE = Bits("b??????????????????????0100101111")
|
||||
def FENCE_V_L = Bits("b??????????????????????1000101111")
|
||||
def FENCE_V_G = Bits("b??????????????????????1010101111")
|
||||
def AMOADD_W = Bits("b?????????????????000000100101011")
|
||||
def AMOXOR_W = Bits("b?????????????????001000100101011")
|
||||
def AMOOR_W = Bits("b?????????????????010000100101011")
|
||||
def AMOAND_W = Bits("b?????????????????011000100101011")
|
||||
def AMOMIN_W = Bits("b?????????????????100000100101011")
|
||||
def AMOMAX_W = Bits("b?????????????????101000100101011")
|
||||
def AMOMINU_W = Bits("b?????????????????110000100101011")
|
||||
def AMOMAXU_W = Bits("b?????????????????111000100101011")
|
||||
def AMOSWAP_W = Bits("b?????????????????000010100101011")
|
||||
def LR_W = Bits("b??????????00000??000100100101011")
|
||||
def SC_W = Bits("b?????????????????000110100101011")
|
||||
def AMOADD_D = Bits("b?????????????????000000110101011")
|
||||
def AMOXOR_D = Bits("b?????????????????001000110101011")
|
||||
def AMOOR_D = Bits("b?????????????????010000110101011")
|
||||
def AMOAND_D = Bits("b?????????????????011000110101011")
|
||||
def AMOMIN_D = Bits("b?????????????????100000110101011")
|
||||
def AMOMAX_D = Bits("b?????????????????101000110101011")
|
||||
def AMOMINU_D = Bits("b?????????????????110000110101011")
|
||||
def AMOMAXU_D = Bits("b?????????????????111000110101011")
|
||||
def AMOSWAP_D = Bits("b?????????????????000010110101011")
|
||||
def LR_D = Bits("b??????????00000??000100110101011")
|
||||
def SC_D = Bits("b?????????????????000110110101011")
|
||||
def FENCE = Bits("b???????????????????????000101111")
|
||||
def FENCE_I = Bits("b???????????????????????010101111")
|
||||
def FENCE_V_L = Bits("b???????????????????????100101111")
|
||||
def FENCE_V_G = Bits("b???????????????????????110101111")
|
||||
def SYSCALL = Bits("b00000000000000000000000001110111")
|
||||
def BREAK = Bits("b00000000000000000000000011110111")
|
||||
def RDCYCLE = Bits("b?????000000000000000001001110111")
|
||||
|
|
@ -357,7 +358,6 @@ object Disassemble
|
|||
BGE-> List(Str("bge "), FMT_B),
|
||||
BGEU-> List(Str("bgeu "), FMT_B),
|
||||
|
||||
J-> List(Str("j "), FMT_J),
|
||||
JAL-> List(Str("jal "), FMT_J),
|
||||
JALR-> List(Str("jalr "), FMT_LD),
|
||||
AUIPC-> List(Str("auipc "), FMT_L),
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user