1
0
Commit Graph

4393 Commits

Author SHA1 Message Date
Stephen Twigg
6808245bb5 Timeout cycles now defined in toplevel Makefrag in order to allow for easier alteration when debugging. 2014-02-12 16:50:13 -08:00
Andrew Waterman
e5de170215 Update Chisel, fixing Verilog backend 2014-02-12 14:28:43 -08:00
Adam Izraelevitz
e25c54e998 Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse 2014-02-12 13:52:24 -08:00
Adam Izraelevitz
c1e544886f Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse 2014-02-12 13:35:12 -08:00
Adam Izraelevitz
1a03a64572 Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse 2014-02-12 12:44:30 -08:00
Adam Izraelevitz
aae5f465c1 Merge branch 'master' of github.com:ucb-bar/reference-chip into dse
Conflicts:
	src/main/scala/ReferenceChip.scala
2014-02-11 17:31:55 -08:00
Adam Izraelevitz
548cf16061 Added jack Makefile and hammer.scala, as well as changed reference chip to have multiple datacache sizes. Requires chisel branch dse 2014-02-11 14:36:47 -08:00
Andrew Waterman
0ebb115a3c Revert to old AUIPC definition 2014-02-10 19:05:14 -08:00
Andrew Waterman
a09ff9fdc7 Revert to old AUIPC definition 2014-02-10 19:04:42 -08:00
Scott Beamer
cda46b3ce1 use --recursive to populate all submodules. with current instructions you can't run tests because riscv-tests/env isn't pulled in 2014-02-06 16:20:48 -08:00
Andrew Waterman
1456170c6d Always stall decode on RoCC -> FENCE; never stall on RoCC -> deferred AMO.RL fence 2014-02-06 12:01:49 -08:00
Yunsup Lee
79486c5802 push tools,tests 2014-02-06 11:25:45 -08:00
Andrew Waterman
11e69a73cd Fix tests when !hwacha; disable hwacha by default 2014-02-06 03:08:33 -08:00
Andrew Waterman
eca8c99f44 Ignore rocc interrupt line when no rocc is present 2014-02-06 03:06:55 -08:00
Andrew Waterman
e7a726fbac Make uarch counters read-only 2014-02-06 01:48:56 -08:00
Yunsup Lee
e20de64b8c rocket sync up 2014-02-06 00:30:31 -08:00
Quan Nguyen
f021213b1d Merge remote-tracking branch 'origin/master' into hwacha-port 2014-02-06 00:21:28 -08:00
Andrew Waterman
62e9313aef Add 16 microarchitectural counters 2014-02-06 00:13:02 -08:00
Yunsup Lee
ac8ff4b7e8 getting vector exceptions to work 2014-02-06 00:12:41 -08:00
Yunsup Lee
ff7cae29f7 hookup rocc interrupt and s bit 2014-02-06 00:09:42 -08:00
Yunsup Lee
ab4a3e937b don't share fma pipes 2014-02-05 14:21:43 -08:00
Yunsup Lee
5128298e8a allow chisel to elaborate Modules outside of the ReferenceChip package 2014-02-05 03:29:23 -08:00
Yunsup Lee
dbeadba2dc add vfmvv 2014-02-05 03:28:33 -08:00
Yunsup Lee
107aa0defa recode expander/bank/lfu 2014-02-05 03:28:22 -08:00
Stephen Twigg
8c96e27ca6 Merge branch 'master' into hwacha-port
Mostly Stable version that is passing tests
2014-02-04 17:20:28 -08:00
Stephen Twigg
6a02d15c21 Merge branch 'master' into hwacha-port 2014-02-04 17:05:03 -08:00
Christopher Celio
fc52840ce2 move timeout in Makefile to a variable 2014-01-31 16:52:59 -08:00
Henry Cook
382fa0ef27 cleanups supporting uncore hierarchy 2014-01-31 16:03:58 -08:00
Henry Cook
bbf8010230 cleanups supporting uncore hierarchy 2014-01-31 15:59:21 -08:00
Andrew Waterman
e9d3a650a4 Speed up C++ compilation 2014-01-31 12:25:19 -08:00
Henry Cook
2c2b3a7678 cleanups supporting uncore hierarchy 2014-01-31 12:07:26 -08:00
Andrew Waterman
febd26f505 Correct CSR privilege logic 2014-01-31 01:03:17 -08:00
Stephen Twigg
8062888fb9 Push hwacha, rocket, chisel to newest versions 2014-01-28 22:15:41 -08:00
Stephen Twigg
3c3c469725 Add exception signal to rocc interface 2014-01-28 22:13:16 -08:00
Andrew Waterman
0ce98a7e0c Update riscv-tools 2014-01-28 03:52:55 -08:00
Andrew Waterman
fb827abbfa Use dynamic fesvr library 2014-01-28 03:50:19 -08:00
Andrew Waterman
0266c1f76a Support retirement width > 1 in CSR file 2014-01-24 16:37:40 -08:00
Andrew Waterman
267394d3cc Fix CSR interlocks 2014-01-24 16:37:40 -08:00
Andrew Waterman
1f986d1c96 Branches don't care about the ALU input/function 2014-01-24 16:37:40 -08:00
Andrew Waterman
a1b7774f5d Simplify handling of CAUSE register 2014-01-24 16:37:39 -08:00
Yunsup Lee
ce36d67f05 push tools/tests 2014-01-22 20:18:44 -08:00
Andrew Waterman
3e634aef1d Fix HTIF for cache line sizes other than 64 B 2014-01-22 18:20:36 -08:00
Christopher Celio
a2be21361e Allow ICacheConfig to toggle fetch-width. 2014-01-22 16:19:57 -08:00
Andrew Waterman
7c11cf49b8 Update riscv-tools 2014-01-21 16:23:32 -08:00
Andrew Waterman
b6c6bddb62 Add full CSRRx support and an asm test 2014-01-21 16:20:24 -08:00
Andrew Waterman
a7489920ce Support CSR atomics on all CSRs, not just STATUS 2014-01-21 16:17:39 -08:00
Stephen Twigg
e7ee94bcc8 Merge branch 'master' into hwacha-port 2014-01-21 15:23:05 -08:00
Andrew Waterman
6ba2c1abe5 Use auto-generated CAUSE constants 2014-01-21 15:01:54 -08:00
Stephen Twigg
ee0c4ca291 Push chisel, rocket, hwacha, tools, tests to incorporate a bunch of new changes (ISA alterations) 2014-01-21 14:48:04 -08:00
Andrew Waterman
6f7ae01b1a More FPU fixes 2014-01-17 14:10:10 -08:00