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riscv
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rocket-chip
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3e634aef1d3afedacc4035248d81bc742377aff5
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Andrew Waterman
3e634aef1d
Fix HTIF for cache line sizes other than 64 B
2014-01-22 18:20:36 -08:00
uncore
Fix HTIF for cache line sizes other than 64 B
2014-01-22 18:20:36 -08:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%