riscv/rocket-chip
1
0
Fork 0
Code Releases Activity
Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
219 Commits 1 Branch 0 Tags 13 MiB
Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
Verilog 0.8%
Other 0.7%
3e634aef1d
Go to file
Andrew Waterman 3e634aef1d Fix HTIF for cache line sizes other than 64 B
2014-01-22 18:20:36 -08:00
uncore Fix HTIF for cache line sizes other than 64 B 2014-01-22 18:20:36 -08:00