Push chisel, rocket, hwacha, tools, tests to incorporate a bunch of new changes (ISA alterations)

chisel

@@ -1 +1 @@
-Subproject commit 4483d41471e4cb8e77b61f3f13255f4d59425d61
+Subproject commit ae1d1de82188f0a1d79a4e8eb613743942a13eb3

csrc/emulator.cc

@@ -125,7 +125,7 @@ int main(int argc, char** argv)
     }
 
     if (log)
-      tile.print(stderr);
+      tile.print(stderr, stderr);
 
     if (vcd)
       tile.dump(vcdfile, trace_count);

riscv-tests

@@ -1 +1 @@
-Subproject commit fdf5e6f97d53722d7ec44c4591f1ab740a092808
+Subproject commit 7356626efe5c331f77202e6e1d875c85c4b4588a

riscv-tools

@@ -1 +1 @@
-Subproject commit 20b2d997f01a3c879b0158ab1af3f4947628bb36
+Subproject commit 323639fa2ae51fbc60c655d2a16611672809beef

rocket

@@ -1 +1 @@
-Subproject commit 5555e6f7485387ed8fba69c6ae3935fabdf8c6e3
+Subproject commit 9aa03938c05323e292c79b8b5fb4a49e911183d7

src/main/scala/RocketChip.scala

@@ -157,7 +157,7 @@ class Uncore(htif_width: Int, tileList: Seq[ClientCoherenceAgent])(implicit conf
     val mem_backup = new ioMemSerialized(htif_width)
     val mem_backup_en = Bool(INPUT)
   }
-  val htif = Module(new HTIF(htif_width, PCR.RESET, conf.nSCR))
+  val htif = Module(new HTIF(htif_width, CSRs.reset, conf.nSCR))
   val outmemsys = Module(new OuterMemorySystem(htif_width, tileList :+ htif))
   val incoherentWithHtif = (io.incoherent :+ Bool(true).asInput)
   outmemsys.io.incoherent := incoherentWithHtif

src/main/scala/fpga.scala

@@ -45,7 +45,7 @@ class FPGAUncore(htif_width: Int, tileList: Seq[ClientCoherenceAgent])(implicit
     val htif = Vec.fill(conf.nTiles){new HTIFIO(conf.nTiles)}.flip
     val incoherent = Vec.fill(conf.nTiles){Bool()}.asInput
   }
-  val htif = Module(new HTIF(htif_width, PCR.RESET, conf.nSCR))
+  val htif = Module(new HTIF(htif_width, CSRs.reset, conf.nSCR))
   val outmemsys = Module(new FPGAOuterMemorySystem(htif_width, tileList :+ htif))
   val incoherentWithHtif = (io.incoherent :+ Bool(true).asInput)
   outmemsys.io.incoherent := incoherentWithHtif

uncore

@@ -1 +1 @@
-Subproject commit ac4a5373c69c04a003bebe54fb7eca7387a43e4d
+Subproject commit a58265755fcb90aebe5377cb9b7343732fd14b9a