Yunsup Lee
|
bcfcdefe88
|
update hwacha
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2014-02-27 04:39:12 -08:00 |
|
Yunsup Lee
|
46714c0c60
|
more improvements to hwacha
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2014-02-26 21:20:53 -08:00 |
|
Yunsup Lee
|
a5625de3d5
|
support vector irq tests
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2014-02-25 21:18:03 -08:00 |
|
Ben Keller
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fcfc1078f8
|
Merge branch 'master' of github.com:ucb-bar/reference-chip
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2014-02-25 15:54:19 -08:00 |
|
Yunsup Lee
|
220076506c
|
push hwacha; all vector p/v/pt tests work now
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2014-02-25 03:51:15 -08:00 |
|
Yunsup Lee
|
e5c2bd5e7b
|
add extensions option to riscv-dis for better disassembly
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2014-02-25 03:50:32 -08:00 |
|
Yunsup Lee
|
98b830201a
|
add wen signal to dasm printf
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2014-02-25 03:31:06 -08:00 |
|
Yunsup Lee
|
8acc9510c4
|
push hwacha,chisel
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2014-02-24 01:43:55 -08:00 |
|
Yunsup Lee
|
22345dd073
|
push rocket,hwacha
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2014-02-22 22:53:24 -08:00 |
|
Yunsup Lee
|
97b1841fcf
|
change dcache tag bits to 7
|
2014-02-22 22:53:04 -08:00 |
|
Adam Izraelevitz
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f14f386b4f
|
Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
Conflicts:
src/main/scala/ReferenceChip.scala
|
2014-02-19 15:50:28 -08:00 |
|
Adam Izraelevitz
|
a006bffca4
|
Merge branch 'master' of github.com:ucb-bar/reference-chip into dse
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2014-02-19 15:04:03 -08:00 |
|
Adam Izraelevitz
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58d2e62e3f
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Merge branch 'master' of github.com:ucb-bar/reference-chip into dse
Conflicts:
chisel
src/main/scala/ReferenceChip.scala
|
2014-02-19 14:24:36 -08:00 |
|
Andrew Waterman
|
de965d558a
|
Renumber uarch CSRs into custom CSR space
|
2014-02-14 17:41:17 -08:00 |
|
Andrew Waterman
|
e554f6728d
|
Update chisel
|
2014-02-14 17:41:17 -08:00 |
|
Andrew Waterman
|
8e3ca609f7
|
Renumber uarch CSRs into custom CSR space
|
2014-02-14 17:40:00 -08:00 |
|
Stephen Twigg
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755293d785
|
Push hwacha (refactoring) and add line that when uncommented properly instantiates hwacha).
|
2014-02-14 10:12:09 -08:00 |
|
Andrew Waterman
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02dbd6b0aa
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Don't assign to your own inputs
|
2014-02-12 18:39:40 -08:00 |
|
Stephen Twigg
|
6808245bb5
|
Timeout cycles now defined in toplevel Makefrag in order to allow for easier alteration when debugging.
|
2014-02-12 16:50:13 -08:00 |
|
Andrew Waterman
|
e5de170215
|
Update Chisel, fixing Verilog backend
|
2014-02-12 14:28:43 -08:00 |
|
Adam Izraelevitz
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e25c54e998
|
Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
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2014-02-12 13:52:24 -08:00 |
|
Adam Izraelevitz
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c1e544886f
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Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
|
2014-02-12 13:35:12 -08:00 |
|
Adam Izraelevitz
|
1a03a64572
|
Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
|
2014-02-12 12:44:30 -08:00 |
|
Adam Izraelevitz
|
aae5f465c1
|
Merge branch 'master' of github.com:ucb-bar/reference-chip into dse
Conflicts:
src/main/scala/ReferenceChip.scala
|
2014-02-11 17:31:55 -08:00 |
|
Adam Izraelevitz
|
548cf16061
|
Added jack Makefile and hammer.scala, as well as changed reference chip to have multiple datacache sizes. Requires chisel branch dse
|
2014-02-11 14:36:47 -08:00 |
|
Andrew Waterman
|
0ebb115a3c
|
Revert to old AUIPC definition
|
2014-02-10 19:05:14 -08:00 |
|
Andrew Waterman
|
a09ff9fdc7
|
Revert to old AUIPC definition
|
2014-02-10 19:04:42 -08:00 |
|
Scott Beamer
|
cda46b3ce1
|
use --recursive to populate all submodules. with current instructions you can't run tests because riscv-tests/env isn't pulled in
|
2014-02-06 16:20:48 -08:00 |
|
Andrew Waterman
|
1456170c6d
|
Always stall decode on RoCC -> FENCE; never stall on RoCC -> deferred AMO.RL fence
|
2014-02-06 12:01:49 -08:00 |
|
Yunsup Lee
|
79486c5802
|
push tools,tests
|
2014-02-06 11:25:45 -08:00 |
|
Andrew Waterman
|
11e69a73cd
|
Fix tests when !hwacha; disable hwacha by default
|
2014-02-06 03:08:33 -08:00 |
|
Andrew Waterman
|
eca8c99f44
|
Ignore rocc interrupt line when no rocc is present
|
2014-02-06 03:06:55 -08:00 |
|
Andrew Waterman
|
e7a726fbac
|
Make uarch counters read-only
|
2014-02-06 01:48:56 -08:00 |
|
Yunsup Lee
|
e20de64b8c
|
rocket sync up
|
2014-02-06 00:30:31 -08:00 |
|
Quan Nguyen
|
f021213b1d
|
Merge remote-tracking branch 'origin/master' into hwacha-port
|
2014-02-06 00:21:28 -08:00 |
|
Andrew Waterman
|
62e9313aef
|
Add 16 microarchitectural counters
|
2014-02-06 00:13:02 -08:00 |
|
Yunsup Lee
|
ac8ff4b7e8
|
getting vector exceptions to work
|
2014-02-06 00:12:41 -08:00 |
|
Yunsup Lee
|
ff7cae29f7
|
hookup rocc interrupt and s bit
|
2014-02-06 00:09:42 -08:00 |
|
Yunsup Lee
|
ab4a3e937b
|
don't share fma pipes
|
2014-02-05 14:21:43 -08:00 |
|
Yunsup Lee
|
5128298e8a
|
allow chisel to elaborate Modules outside of the ReferenceChip package
|
2014-02-05 03:29:23 -08:00 |
|
Yunsup Lee
|
dbeadba2dc
|
add vfmvv
|
2014-02-05 03:28:33 -08:00 |
|
Yunsup Lee
|
107aa0defa
|
recode expander/bank/lfu
|
2014-02-05 03:28:22 -08:00 |
|
Stephen Twigg
|
8c96e27ca6
|
Merge branch 'master' into hwacha-port
Mostly Stable version that is passing tests
|
2014-02-04 17:20:28 -08:00 |
|
Stephen Twigg
|
6a02d15c21
|
Merge branch 'master' into hwacha-port
|
2014-02-04 17:05:03 -08:00 |
|
Christopher Celio
|
fc52840ce2
|
move timeout in Makefile to a variable
|
2014-01-31 16:52:59 -08:00 |
|
Henry Cook
|
382fa0ef27
|
cleanups supporting uncore hierarchy
|
2014-01-31 16:03:58 -08:00 |
|
Henry Cook
|
bbf8010230
|
cleanups supporting uncore hierarchy
|
2014-01-31 15:59:21 -08:00 |
|
Andrew Waterman
|
e9d3a650a4
|
Speed up C++ compilation
|
2014-01-31 12:25:19 -08:00 |
|
Henry Cook
|
2c2b3a7678
|
cleanups supporting uncore hierarchy
|
2014-01-31 12:07:26 -08:00 |
|
Andrew Waterman
|
febd26f505
|
Correct CSR privilege logic
|
2014-01-31 01:03:17 -08:00 |
|