Yunsup Lee
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7fe052e1bf
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update README
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2013-04-24 02:05:28 -07:00 |
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Yunsup Lee
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9114012def
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assmebly tests are now built from riscv-tests
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2013-04-24 01:59:14 -07:00 |
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Yunsup Lee
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93df795e48
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change LLC leaf SRAM size
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2013-04-22 11:06:50 -07:00 |
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Andrew Waterman
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7f5282d355
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replace RDNPC with AUIPC
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2013-04-22 04:21:46 -07:00 |
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Andrew Waterman
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50ccc20bf3
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replace RDNPC with AUIPC
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2013-04-22 04:20:15 -07:00 |
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Huy Vo
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2ac3fd5306
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get rid of init_node
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2013-04-20 01:36:32 -07:00 |
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Huy Vo
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0d87e3bacc
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fixed init pin generation
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2013-04-20 00:38:01 -07:00 |
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Henry Cook
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a01cdf95fd
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tell physical networks carring cache lines to lock arbitration for REFILL_CYCLES pumps
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2013-04-10 13:53:27 -07:00 |
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Henry Cook
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db5a060c7d
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fix io dir
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2013-04-10 13:47:30 -07:00 |
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Henry Cook
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766d5622b1
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Prevent messages from becoming interleaved in the BasicCrossbar. Remove dependency trackers from the uncore, use msg headers instead. Have one ReleaseHnadler per core for now.
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2013-04-10 13:46:31 -07:00 |
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Henry Cook
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d7982bf27f
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bump uncore for grant fix
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2013-04-09 14:29:49 -07:00 |
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Henry Cook
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74187c2068
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Always route voluntary releases to ReleaseTracker to ensure all grants are sent
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2013-04-09 14:09:55 -07:00 |
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Andrew Waterman
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7ea782fd22
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add LR/SC
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2013-04-07 19:36:15 -07:00 |
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Andrew Waterman
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ae7720e284
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guarantee LR/SC forward progress
the mechanism is to block new probes for several cycles after a successful LR.
this also cleans up the MSHR <-> ProbeUnit interface slightly.
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2013-04-07 19:27:21 -07:00 |
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Andrew Waterman
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7ff5b5b86f
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treat load-reserved as a non-dirtying store
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2013-04-07 19:25:26 -07:00 |
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Andrew Waterman
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3479f1c6cd
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add LR/SC support
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2013-04-07 19:25:20 -07:00 |
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Andrew Waterman
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e74e032c87
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simplify MSHR memory response logic
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2013-04-06 01:03:37 -07:00 |
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Andrew Waterman
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1abb9277db
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fix LR/SC atomicity violation
note, it's still not starvation-free.
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2013-04-05 19:13:38 -07:00 |
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Andrew Waterman
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8cbdeb2abf
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add LR/SC support
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2013-04-04 17:07:09 -07:00 |
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Andrew Waterman
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fc46daecf6
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don't flush pipeline on writes to side-effect-free PCRs
notably, K0, K1, and EPC
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2013-04-04 17:07:09 -07:00 |
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Andrew Waterman
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8b439ef20d
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only support setpcr/clearpcr of SR
the full PCR RMW support was wasted area/power
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2013-04-04 17:07:08 -07:00 |
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Andrew Waterman
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d43f484feb
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take interrupts on nonzero fromhost values
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2013-04-04 17:07:08 -07:00 |
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Andrew Waterman
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d4a3351cfc
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expose pending interrupts in status register
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2013-04-04 17:07:08 -07:00 |
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Henry Cook
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c6b56c5f25
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bump rocket for coherence bug fix
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2013-04-04 15:52:20 -07:00 |
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Henry Cook
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f8aebcbf8c
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fix for cache controller bug: failing to mux correct metadata into mshr.io.old_meta on tag match
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2013-04-04 15:50:29 -07:00 |
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Henry Cook
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9d5e97d89e
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override io in LogicalNetwork
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2013-03-28 14:10:20 -07:00 |
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Henry Cook
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b6cc08e8ca
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override io in LogicalNetwork
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2013-03-28 14:09:48 -07:00 |
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Henry Cook
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16ad8a7e9c
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Fixes after merge
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2013-03-25 19:14:38 -07:00 |
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Henry Cook
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67fc09f62e
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Fixes after merge, and always self probe.
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2013-03-25 19:12:19 -07:00 |
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Henry Cook
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16113a96ba
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fixes after merge
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2013-03-25 19:09:08 -07:00 |
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Andrew Waterman
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8e926f8d79
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remove aborts
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2013-03-25 17:01:46 -07:00 |
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Henry Cook
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eec590c1bf
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Added support for multiple L2 banks. Moved tile IO queueing.
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2013-03-25 17:01:46 -07:00 |
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Henry Cook
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806f897fc4
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nTiles -> nClients in LogicalNetworkConfig
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2013-03-25 17:01:46 -07:00 |
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Andrew Waterman
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ce4c1aa566
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remove aborts
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2013-03-25 17:01:46 -07:00 |
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Henry Cook
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cf76665d09
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writebacks on release network pass asm tests and bmarks
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2013-03-25 17:01:46 -07:00 |
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Henry Cook
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a0dc8d52d6
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using new network and l2 controller
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2013-03-25 17:01:46 -07:00 |
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Andrew Waterman
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def11e44b8
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don't pipe stdout to vcd2vpd
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2013-03-25 17:01:13 -07:00 |
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Andrew Waterman
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ef4927c9ad
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use a named pipe for VCD -> VPD conversion
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2013-03-25 16:19:19 -07:00 |
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Henry Cook
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06f5de3b68
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Merge branch 'release-xacts'
Conflicts:
src/package.scala
src/uncore.scala
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2013-03-20 17:38:46 -07:00 |
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Henry Cook
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95f0a688e9
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Merge branch 'release-xacts'
Conflicts:
src/htif.scala
src/icache.scala
src/nbdcache.scala
src/tile.scala
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2013-03-20 17:37:50 -07:00 |
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Henry Cook
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4d007d5c40
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changed val names in hub to match new tilelink names
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2013-03-20 17:14:07 -07:00 |
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Henry Cook
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273bd34091
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Generalized mem arbiter, moved to uncore. Support for multiple banks when acking grants.
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2013-03-20 15:53:36 -07:00 |
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Henry Cook
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c36b1dfa30
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Cleaned up uncore and coherence interface. Removed defunct broadcast hub. Trait-ified tilelink bundle components. Added generalized mem arbiter.
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2013-03-20 15:52:39 -07:00 |
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Henry Cook
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319b4544d7
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nTiles -> nClients in LogicalNetworkConfig
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2013-03-20 14:30:16 -07:00 |
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Henry Cook
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a7ae7e5758
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Cleaned up self-probes
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2013-03-20 14:28:20 -07:00 |
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Henry Cook
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6d2541aced
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nTiles -> nClients in LogicalNetworkConfig
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2013-03-20 14:12:36 -07:00 |
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Andrew Waterman
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7b019cb0da
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rmeove aborts
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2013-03-19 15:30:23 -07:00 |
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Andrew Waterman
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ea9d0b771e
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remove aborts; simplify probes
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2013-03-19 15:29:40 -07:00 |
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Yunsup Lee
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bc140ce9bc
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add vec_{vvadd,cmplxmult,matmul} bmarks
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2013-03-19 00:43:51 -07:00 |
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Yunsup Lee
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9efe71412f
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add DRAMSideLLCNull
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2013-03-19 00:43:34 -07:00 |
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