riscv/rocket-chip: Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip) - rocket-chip - Tiband Gitea

riscv/rocket-chip

Go to file

Andrew Waterman d4a3351cfc expose pending interrupts in status register

2013-04-04 17:07:08 -07:00

rocket/src/main/scala

expose pending interrupts in status register

2013-04-04 17:07:08 -07:00

Languages

Scala 93.1%

C++ 2.1%

Python 2%

Makefile 1.2%

Verilog 0.8%

Other 0.7%