Henry Cook
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dc53529156
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added resolver, bumped chisel dependency
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2013-08-21 16:00:51 -07:00 |
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Henry Cook
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b80f45f8f2
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Merge branch 'chisel-v2' of github.com:ucb-bar/uncore into chisel-v2
Conflicts:
src/main/scala/llc.scala
src/main/scala/slowio.scala
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2013-08-15 16:22:12 -07:00 |
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Henry Cook
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3763cd0004
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standardizing sbt build conventions
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2013-08-15 15:57:16 -07:00 |
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Henry Cook
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17d404b325
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final Reg changes
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2013-08-15 15:27:38 -07:00 |
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Henry Cook
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1308c08baa
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Reg standardization
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2013-08-13 17:52:53 -07:00 |
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Henry Cook
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7ff4126d04
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Abstracted UncachedTileLinkIOArbiters
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2013-08-13 00:01:11 -07:00 |
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Henry Cook
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9162fbc9b5
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Clean up cloning in tilelink bundles
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2013-08-12 23:15:54 -07:00 |
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Huy Vo
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d5c9eb0f54
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reset -> resetVal, getReset -> reset
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2013-08-12 20:52:18 -07:00 |
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Henry Cook
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5c7a1f5cd6
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initial attempt at upgrade
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2013-08-12 10:36:44 -07:00 |
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Henry Cook
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bc2b45da12
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Fold uncore constants into TileLinkConfiguration, update coherence API
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2013-08-02 14:55:06 -07:00 |
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Henry Cook
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d8440b042a
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Make compatible with scala 2.10. Refactor constants into package object. Remove networking primitives from package object. Clean up request generators. Chnage ++ to +: for appending to io.incoherent.
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2013-07-24 23:22:36 -07:00 |
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Henry Cook
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db8e5fda9b
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new tilelink arbiter types, reduced release xact trackers
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2013-07-09 15:37:42 -07:00 |
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Henry Cook
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9631b6081e
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Merge branch 'tilelink-data'
Conflicts:
src/package.scala
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2013-05-23 14:53:10 -07:00 |
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Henry Cook
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cf02f1ef01
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use new locking round robin arbiter
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2013-05-23 14:16:50 -07:00 |
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Henry Cook
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4c1f105ce9
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added PairedData link type with matching crossbar, ported tilelink and uncore to use
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2013-05-21 17:19:07 -07:00 |
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Andrew Waterman
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0672773c1a
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for now, don't use asserts outside of components
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2013-05-09 02:14:44 -07:00 |
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Henry Cook
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9a3b2e7006
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new paired meta/data IO type, and matching arbiter
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2013-05-01 17:18:12 -07:00 |
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Henry Cook
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9a258e7fb4
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use new locking round robin arbiter
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2013-04-30 17:10:06 -07:00 |
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Henry Cook
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fedc2753e4
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make sure master_xact_id field is large enough for temporary extra release trackers
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2013-04-30 11:03:34 -07:00 |
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Henry Cook
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12d394811e
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Allow release data to be written out even before all releases have been collected
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2013-04-29 18:48:31 -07:00 |
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Henry Cook
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766d5622b1
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Prevent messages from becoming interleaved in the BasicCrossbar. Remove dependency trackers from the uncore, use msg headers instead. Have one ReleaseHnadler per core for now.
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2013-04-10 13:46:31 -07:00 |
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Henry Cook
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74187c2068
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Always route voluntary releases to ReleaseTracker to ensure all grants are sent
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2013-04-09 14:09:55 -07:00 |
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Andrew Waterman
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7ff5b5b86f
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treat load-reserved as a non-dirtying store
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2013-04-07 19:25:26 -07:00 |
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Andrew Waterman
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3479f1c6cd
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add LR/SC support
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2013-04-07 19:25:20 -07:00 |
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Henry Cook
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b6cc08e8ca
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override io in LogicalNetwork
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2013-03-28 14:09:48 -07:00 |
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Henry Cook
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67fc09f62e
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Fixes after merge, and always self probe.
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2013-03-25 19:12:19 -07:00 |
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Henry Cook
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06f5de3b68
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Merge branch 'release-xacts'
Conflicts:
src/package.scala
src/uncore.scala
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2013-03-20 17:38:46 -07:00 |
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Henry Cook
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4d007d5c40
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changed val names in hub to match new tilelink names
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2013-03-20 17:14:07 -07:00 |
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Henry Cook
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c36b1dfa30
|
Cleaned up uncore and coherence interface. Removed defunct broadcast hub. Trait-ified tilelink bundle components. Added generalized mem arbiter.
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2013-03-20 15:52:39 -07:00 |
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Henry Cook
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319b4544d7
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nTiles -> nClients in LogicalNetworkConfig
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2013-03-20 14:30:16 -07:00 |
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Henry Cook
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a7ae7e5758
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Cleaned up self-probes
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2013-03-20 14:28:20 -07:00 |
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Andrew Waterman
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7b019cb0da
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rmeove aborts
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2013-03-19 15:30:23 -07:00 |
|
Yunsup Lee
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f120800aa2
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add DRAMSideLLCNull
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2013-03-19 00:41:28 -07:00 |
|
Yunsup Lee
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717a78f964
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fix seqRead inference
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2013-03-19 00:41:09 -07:00 |
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Henry Cook
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9f0ccbeac5
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writebacks on release network pass asm tests and bmarks
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2013-02-28 18:13:41 -08:00 |
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Andrew Waterman
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944f56a766
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remove duplicate definitions
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2013-02-28 14:55:19 -08:00 |
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Henry Cook
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47a632cc59
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added support for voluntary wbs over the release network
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2013-01-28 16:39:45 -08:00 |
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Henry Cook
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1134bbf1a4
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cleanup disconnected io pins (overwritten network headers)
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2013-01-27 11:59:17 -08:00 |
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Andrew Waterman
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1945fa898b
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make external clock divider programmable
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2013-01-24 23:40:47 -08:00 |
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Henry Cook
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b5ccdab514
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changed val names in hub to match new tilelink names
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2013-01-22 20:09:21 -08:00 |
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Henry Cook
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c211d74e95
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New TileLink names
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2013-01-21 17:17:26 -08:00 |
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Henry Cook
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fb2644760f
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single-ported coherence master
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2013-01-16 23:57:35 -08:00 |
|
Henry Cook
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f7c0152409
|
Refactored packet headers/payloads
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2013-01-15 15:52:47 -08:00 |
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Henry Cook
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f836bd93e1
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Bugfix in crossbar ready sigs, added adapter for old hub, removed incoherent sig from tilelink
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2013-01-07 14:01:39 -08:00 |
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Henry Cook
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418e3fdf50
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Bugfix in crossbar ready sigs, added adapter for old hub, removed incoherent sig from tilelink
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2013-01-07 13:57:48 -08:00 |
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Henry Cook
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400d48e3de
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Refactored uncore conf
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2012-12-13 11:39:14 -08:00 |
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Henry Cook
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6d61baa6cd
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Initial version of phys/log network compiles
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2012-12-12 11:08:50 -08:00 |
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Henry Cook
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f359518e52
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wip: new network classes
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2012-12-12 11:08:50 -08:00 |
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Henry Cook
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8d69f9b41c
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Initial version of phys/log network compiles
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2012-12-12 00:05:28 -08:00 |
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Henry Cook
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12caa55dc7
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wip: new network classes
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2012-12-06 18:51:30 -08:00 |
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