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riscv
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rocket-chip
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f836bd93e1b40c50021587f1b1ce59c43b9e9b46
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Henry Cook
f836bd93e1
Bugfix in crossbar ready sigs, added adapter for old hub, removed incoherent sig from tilelink
2013-01-07 14:01:39 -08:00
uncore
/src
Bugfix in crossbar ready sigs, added adapter for old hub, removed incoherent sig from tilelink
2013-01-07 13:57:48 -08:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%