Yunsup Lee
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ef2e96211c
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bump chisel/hardfloat/rocket/uncore
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2014-09-12 18:10:00 -07:00 |
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Yunsup Lee
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09de2e2794
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compute number of outstanding misses for DRAMSideLLCNull
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2014-09-12 18:09:38 -07:00 |
|
Yunsup Lee
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e40a6fdd64
|
more tweaks to README
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2014-09-12 10:22:00 -07:00 |
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Yunsup Lee
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c57dea415c
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fix markdown
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2014-09-12 10:18:14 -07:00 |
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Yunsup Lee
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1cfd9f5a0e
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add LICENSE
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2014-09-12 10:15:04 -07:00 |
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Stephen Twigg
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2367b7beb5
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Added logic to sbt so that, for rocketchip, it will automatically include src/main/scala sources from subdirectories into the rocketchip top-level project not already handled by formal subprojects
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2014-09-12 01:08:11 -07:00 |
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Yunsup Lee
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2c33852c52
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final touches
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2014-09-12 00:19:29 -07:00 |
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Yunsup Lee
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275b72368b
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add CONFIG to the name of simulator executable
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2014-09-11 22:11:58 -07:00 |
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Yunsup Lee
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c98afa1fea
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turn off DRAMSideLLC
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2014-09-11 22:10:25 -07:00 |
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Yunsup Lee
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b5a64487eb
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turn off DRAMSideLLC
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2014-09-11 22:07:44 -07:00 |
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Yunsup Lee
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9dfaf5459e
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bump hardfloat,riscv-tools
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2014-09-11 03:08:21 -07:00 |
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Yunsup Lee
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5f8bd18fac
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Makefiles should be perfect
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2014-09-11 02:53:46 -07:00 |
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Yunsup Lee
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bb22ecc8b5
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fix rocket interrupt issue
h/t Andrew
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2014-09-11 02:52:05 -07:00 |
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Yunsup Lee
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086bb02c24
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check RISCV envirnoment variable
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2014-09-11 02:38:21 -07:00 |
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Yunsup Lee
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02c08a156f
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generate consts.vh from chisel source
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2014-09-10 17:14:55 -07:00 |
|
Yunsup Lee
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cfecd8832d
|
tease out reference-chip specific stuff
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2014-09-09 20:49:28 -07:00 |
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Yunsup Lee
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6b6bdd2b83
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decommission Slave top-level module for fpga build
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2014-09-08 00:23:15 -07:00 |
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Yunsup Lee
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ddfd3ce968
|
further generalize fpga/vlsi builds
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2014-09-08 00:21:57 -07:00 |
|
Yunsup Lee
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3175a40509
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add berkeley-hardfloat as submodule
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2014-09-08 00:18:49 -07:00 |
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Yunsup Lee
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1e5b2f658f
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remove existing hardfloat repository
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2014-09-07 23:45:47 -07:00 |
|
Henry Cook
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ae05125f29
|
Adjustements to top-level parameters and knobs for hwacha
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2014-09-07 17:57:33 -07:00 |
|
Henry Cook
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4126678c9d
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Merge branch 'dse'
Conflicts:
rocket
uncore
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2014-09-06 06:59:14 -07:00 |
|
Yunsup Lee
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1cb2d1d7b7
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initialize all SRAMs to avoid X propagation problem
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2014-09-04 11:06:01 -07:00 |
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Yunsup Lee
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763c57931b
|
fix problem introduced with verilog generation in vsim/fsim
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2014-09-04 09:49:57 -07:00 |
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Scott Beamer
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6c6f5a3843
|
add verilog target to build without simulator
|
2014-09-03 17:28:45 -07:00 |
|
Scott Beamer
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13b6ec4712
|
including better sbt fixes
|
2014-09-02 15:16:31 -07:00 |
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Scott Beamer
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26649b30ed
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fixes sbt error during first run
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2014-09-02 14:34:55 -07:00 |
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Henry Cook
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82467313dd
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merge in rocketchip changes from master
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2014-09-02 13:51:57 -07:00 |
|
Henry Cook
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3250db0dd5
|
bump uncore
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2014-09-02 12:37:44 -07:00 |
|
Henry Cook
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8622eb0f5b
|
bump rocket
|
2014-09-01 13:34:15 -07:00 |
|
Yunsup Lee
|
7734285507
|
forgot to comment out hwacha
|
2014-09-01 09:01:36 -07:00 |
|
Yunsup Lee
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0d18e491c7
|
update gitignore
|
2014-09-01 08:59:59 -07:00 |
|
Yunsup Lee
|
882fecf43a
|
update README
|
2014-08-31 20:57:16 -07:00 |
|
Yunsup Lee
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c03c09ec31
|
update for rocket-chip release
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2014-08-31 20:26:55 -07:00 |
|
Henry Cook
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78ab83d224
|
refactor fpga top/config
|
2014-08-28 13:07:54 -07:00 |
|
Scott Beamer
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83380053de
|
use fpga backend for fpga
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2014-08-26 15:56:27 -07:00 |
|
Henry Cook
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bf356b9cb4
|
Refactor to combine fpga and vlsi tops, part 1
|
2014-08-24 19:30:53 -07:00 |
|
Henry Cook
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a41d55b643
|
Final parameter refactor.
|
2014-08-23 01:26:03 -07:00 |
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Scott Beamer
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63b62394d9
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added l2 to fpga
with new chisel & uncore, it goes into brams
|
2014-08-20 15:41:07 -07:00 |
|
Henry Cook
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9b36162b67
|
Point rocket/ to rocket-staging repo
|
2014-08-19 14:20:15 -07:00 |
|
Henry Cook
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2741bbf2b9
|
Point rocket/ to rocket-staging repo
|
2014-08-19 13:53:24 -07:00 |
|
Scott Beamer
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e1a4d12c65
|
fix small typos in README
|
2014-08-14 17:59:24 -07:00 |
|
Henry Cook
|
1563c1bb36
|
Fixed cache params. Asm and bmark tests pass.
|
2014-08-12 15:00:54 -07:00 |
|
Henry Cook
|
910c886837
|
bump chisel
|
2014-08-12 14:53:19 -07:00 |
|
Henry Cook
|
74796868e7
|
chisel bump
|
2014-08-12 10:58:09 -07:00 |
|
Henry Cook
|
0ca24a5d91
|
fix debug flags
|
2014-08-12 10:35:39 -07:00 |
|
Henry Cook
|
7f07771600
|
Cache utility traits. Completely compiles, asm tests hang.
|
2014-08-11 18:37:10 -07:00 |
|
Henry Cook
|
1983260e6f
|
a few more fixes. some param lookups fail (here() in Alter blocks)
|
2014-08-10 23:08:21 -07:00 |
|
Henry Cook
|
63bd0b9d2a
|
Partial conversion to params. Compiles but does not elaborate. Rocket and uncore conversion complete. FPGA and VLSI config are identical. HwachaConfig and MemoryControllerConfig not yet removed.
|
2014-08-08 12:27:47 -07:00 |
|
Scott Beamer
|
d3a8a224fe
|
README updated for new fpga flow
|
2014-08-07 14:52:56 -07:00 |
|