1
0
Commit Graph

4966 Commits

Author SHA1 Message Date
Howard Mao
176d3c890c add some more regression tests 2015-12-15 23:00:17 -08:00
Howard Mao
ddc79674f9 fix some issues with cache request merging 2015-12-15 21:31:02 -08:00
Colin Schmidt
c080e82e92 Merge pull request #34 from seldridge/rocketchip-addons-build
build.scala uses space-delimited ROCKETCHIP_ADDONS
2015-12-09 11:57:19 -08:00
Schuyler Eldridge
e50e4d4c84 build.scala uses space-delimited ROCKETCHIP_ADDONS 2015-12-09 14:17:16 -05:00
Andrew Waterman
91be080526 Merge pull request #32 from ucb-bar/javamaxpermsize
Double Java MaxPermSize.
2015-12-07 13:58:41 -08:00
Jim Lawson
c5e9558571 Double Java MaxPermSize. 2015-12-07 12:05:06 -08:00
Howard Mao
0c91e00676 move GroundTest configs to a separate file 2015-12-06 03:01:05 -08:00
Howard Mao
e71293e2ae fix bug in narrower logic 2015-12-06 02:58:12 -08:00
Howard Mao
484e8ce20b add regression tests for catching specific memory bugs 2015-12-06 02:57:45 -08:00
Howard Mao
4f5dabcda2 add SCR file to device tree 2015-12-05 00:28:58 -08:00
Howard Mao
c57639b23f reverse order of RWX bits for compatibility 2015-12-05 00:27:24 -08:00
Howard Mao
6fc1e92708 add option to print cycle count regardless of exit status 2015-12-04 12:04:13 -08:00
Sagar Karandikar
93aa370b87 yunsup's fix for dgemm-opt assertion failure 2015-12-03 14:03:10 -08:00
Howard Mao
f35b83d3ca allow configuration of rocket ICache buffering 2015-12-02 17:18:39 -08:00
Howard Mao
7690de07e1 allow icache to configure which side of the way mux gets buffered 2015-12-02 17:17:49 -08:00
Howard Mao
369ee74a2c change names of RoCC tilelink interfaces to be more sensible 2015-12-02 16:28:23 -08:00
Howard Mao
ebf2417a32 rocc-fpu-port merged into master for rocket 2015-12-02 09:02:43 -08:00
Howard Mao
f67b02fadb Merge branch 'rocc-fpu-port' 2015-12-02 08:52:15 -08:00
Howard Mao
73b0263663 disconnect fpu port if no fpu-using RoCC accelerators 2015-12-01 20:41:58 -08:00
Howard Mao
3f8f726296 make rocc build independent from parameter structure 2015-12-01 18:47:52 -08:00
Howard Mao
dcca0b1d86 fix up FPU connection 2015-12-01 18:14:58 -08:00
Howard Mao
08f77ca90d Merge branch 'master' into rocc-fpu-port 2015-12-01 18:00:28 -08:00
Howard Mao
cdc476a370 change Rocc parameterization 2015-12-01 17:56:09 -08:00
Howard Mao
e76dfa55f7 change the way rocc is parameterized 2015-12-01 17:54:56 -08:00
Andrew Waterman
e0d849fec5 Fix zscale testing
Use the following command in vsim:

make CONFIG=ZscaleConfig MODEL=ZscaleTop TB=ZscaleTestHarness run-asm-tests
2015-12-01 17:31:48 -08:00
Howard Mao
4833d41dbc make the connection of FPU ports optional per accelerator 2015-12-01 16:48:05 -08:00
Andrew Waterman
5eeb8969f6 fix zscale build (run still fails) 2015-12-01 16:20:34 -08:00
Howard Mao
c8c68e75bb base NGenerators on NTiles, not the other way around 2015-12-01 15:26:09 -08:00
Howard Mao
0b15b19381 add arbiter for FPU 2015-12-01 10:22:31 -08:00
Howard Mao
1db2da00f3 Merge branch 'master' into rocc-fpu-port 2015-11-30 19:18:58 -08:00
Howard Mao
e4043570bd bump groundtest and hardfloat 2015-11-30 18:06:15 -08:00
Howard Mao
40d68406d6 use xlen parameter for ALU 2015-11-30 18:04:44 -08:00
Howard Mao
e80340198a use implicit parameters for ALU 2015-11-30 17:35:33 -08:00
Colin Schmidt
ec4ade988b [travis] add multiple configs including rocc 2015-11-28 07:17:49 -08:00
Colin Schmidt
7259239ba4 Merge pull request #31 from ucb-bar/multirocc
implement support for multiple RoCC accelerators
2015-11-28 08:56:07 -05:00
Colin Schmidt
90991014a0 Merge pull request #19 from ucb-bar/multirocc
Add support for multiple RoCC accelerators
2015-11-28 08:56:04 -05:00
Howard Mao
7083576156 fix typo in NastiErrorSlave 2015-11-26 12:57:04 -08:00
Howard Mao
23f0756978 implement support for multiple RoCC accelerators 2015-11-26 12:49:04 -08:00
Howard Mao
9256239206 implement support for multiple RoCC accelerators 2015-11-26 12:46:01 -08:00
Howard Mao
58b0a86834 some modifications to AccumulatorExample 2015-11-26 08:48:19 -08:00
Andrew Waterman
e25a020e60 Construct device tree ROM in MMIO region
Rebuild riscv-tools for this to work!
2015-11-25 21:23:37 -08:00
Andrew Waterman
e52685f2e9 Fix LoadGen zero flag 2015-11-25 20:52:30 -08:00
Andrew Waterman
27df04354f Add ROM with NASTI interface 2015-11-25 20:04:31 -08:00
Andrew Waterman
49d93da87e Factor out more common zscale code 2015-11-24 19:17:21 -08:00
Andrew Waterman
e203b8b378 Make ALU generic for zscale 2015-11-24 19:17:07 -08:00
Andrew Waterman
52b25c3da0 Factor out more common zscale code 2015-11-24 18:34:03 -08:00
Andrew Waterman
5294e94794 Remove CSR back pressure ability
We were using it for IPIs, but no longer need it.
2015-11-24 18:28:14 -08:00
Andrew Waterman
4616db4695 Make RegFile/ImmGen usable by zscale 2015-11-24 18:27:07 -08:00
Andrew Waterman
1761db3272 Factor out some common code from zscale 2015-11-24 18:14:06 -08:00
Andrew Waterman
6d1bf5c014 Use generic LoadGen/StoreGen 2015-11-24 18:13:33 -08:00