Andrew Waterman
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4c3f7a36ce
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clean up D$ store data unit
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2012-03-01 19:20:00 -08:00 |
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Henry Cook
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de73eef409
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Fixed elaboration errors in LockingArbiter and BoradcastHub. Fixed ioDecoupled direction error in XactTracker
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2012-03-01 18:24:22 -08:00 |
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Henry Cook
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2152b0283d
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Made xact_rep an ioValid, removed has_data member
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2012-03-01 18:24:21 -08:00 |
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Henry Cook
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4e33b68bea
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Unified hub ios. Fixed some hub elaboration errors.
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2012-03-01 01:20:57 -08:00 |
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Henry Cook
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940027a888
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Finished broadcast hub with split mem req types. Untested.
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2012-02-29 17:58:15 -08:00 |
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Yunsup Lee
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4f00bcc760
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Merge branch 'master' of github.com:ucb-bar/riscv-rocket
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2012-02-29 17:12:02 -08:00 |
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Yunsup Lee
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7e6d990bad
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Merge branch 'master' of github.com:ucb-bar/riscv-rocket
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2012-02-29 17:12:02 -08:00 |
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Andrew Waterman
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8b519e7ea8
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replace tile memory interface with ioTileLink
work in progress towards coherent HTIF. for now, requests
are incoherently passed through a null coherence hub.
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2012-02-29 03:10:47 -08:00 |
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Henry Cook
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ef94f13087
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Broadcast hub nears completion. Still does not handle generation/arbitration for decoupled mem reqs.
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2012-02-29 02:59:27 -08:00 |
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Henry Cook
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6304aa992f
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Fixed race between read resps/reps and write req/reps in null hub
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2012-02-29 00:44:03 -08:00 |
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Andrew Waterman
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eec369a1c7
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separate memory request command and data
also, merge some VLSI/C++ test harness functionality
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2012-02-28 19:06:23 -08:00 |
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Henry Cook
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e15284d22c
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Added temporary ioMemHub and made coherence hub implementations depend on it rather than ioMem
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2012-02-28 17:33:32 -08:00 |
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Henry Cook
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ffc7652e01
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Null coherence hub. Begin work on internal tracker logic
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2012-02-27 19:10:15 -08:00 |
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Andrew Waterman
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7d331858e2
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replace ioDCache with ioMem
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2012-02-27 18:36:09 -08:00 |
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Henry Cook
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3393dc2d31
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Added probe_req ready sigs, GenArray to Vec
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2012-02-27 11:26:18 -08:00 |
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Henry Cook
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70cdf869ac
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probe req transactors in coherence hub
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2012-02-27 09:24:33 -08:00 |
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Henry Cook
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b6e6d603cc
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xact init transactors in coherence hub
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2012-02-27 09:24:32 -08:00 |
|
Huy Vo
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0fd777f480
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Merge branch 'master' of github.com:ucb-bar/riscv-rocket
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2012-02-26 17:24:23 -08:00 |
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Huy Vo
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aa099a53fa
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Merge branch 'master' of github.com:ucb-bar/riscv-rocket
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2012-02-26 17:24:23 -08:00 |
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Huy Vo
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e22106af3f
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updating rocket code to lastest version of chisel, passes assembly tests in C++ and Verilog as long as you dont use the vector unit
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2012-02-26 17:24:08 -08:00 |
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Yunsup Lee
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ca2e70454e
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change package name and sbt project name to rocket
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2012-02-25 17:09:26 -08:00 |
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Henry Cook
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8856e2b8bb
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More stylish bundle param names, some hub progress
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2012-02-25 15:27:53 -08:00 |
|
Henry Cook
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dfdcb7c696
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Better foldR
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2012-02-25 15:27:09 -08:00 |
|
Henry Cook
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b3cf8f3f35
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Better abstraction of data bundles
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2012-02-25 12:57:01 -08:00 |
|
Henry Cook
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1dcf25586f
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finished xact_finish and xact_abort transactors in coherence hub
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2012-02-23 18:12:50 -08:00 |
|
Henry Cook
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ffb88467db
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finished xact_rep transactor in coherence hub
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2012-02-23 17:50:02 -08:00 |
|
Henry Cook
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c3646e2e64
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Improved TileIO organization, beginnings of hub implementation
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2012-02-22 18:24:52 -08:00 |
|
Henry Cook
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33a26424bd
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Refining tilelink interface
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2012-02-22 12:15:47 -08:00 |
|
Henry Cook
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b9c42a80c8
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Added coherence message type enums
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2012-02-22 12:15:47 -08:00 |
|
Henry Cook
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cfb818aa97
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Abstract class for coherence policies
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2012-02-16 12:59:38 -08:00 |
|
Henry Cook
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ecbf47fe16
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Replace nbcache manipulation of meta state bits with abstracted functions
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2012-02-16 10:43:40 -08:00 |
|
Henry Cook
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76cacbd991
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Added coherence tile function defs, with traits and constants
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2012-02-16 00:16:45 -08:00 |
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Andrew Waterman
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71c8d3fd41
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reorganize directory structure
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2012-02-08 15:13:08 -08:00 |
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