Megan Wachs
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4c26a6bc96
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Create seperate Mul/Div paramters instead of UseFastMulDiv
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2016-07-15 14:40:37 -07:00 |
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Andrew Waterman
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ba08255450
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bump rocket
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2016-07-14 22:11:19 -07:00 |
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Andrew Waterman
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768403f8fa
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Bump rocket; remove ICacheBufferWays parameter
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2016-07-14 12:50:16 -07:00 |
|
Howard Mao
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18ea58c85f
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remove unnecessary CAMs from converters
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2016-07-13 12:42:50 -07:00 |
|
Howard Mao
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4c79215fde
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add a script for checking comparator trace
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2016-07-12 14:42:04 -07:00 |
|
Howard Mao
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90bcd3dbdc
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make sure DirectGroundTest testers given correct TL settings
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2016-07-11 18:11:01 -07:00 |
|
Howard Mao
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8f0fa11ce4
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optionally export detailed status information in DirectGroundTest
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2016-07-11 18:11:00 -07:00 |
|
Howard Mao
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b64998ec05
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make sure dramsim reads and writes occur in the order they are received
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2016-07-11 18:11:00 -07:00 |
|
Howard Mao
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cb2a18b533
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allow direct instatiation of arbitrary non-caching groundtests
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2016-07-11 18:11:00 -07:00 |
|
Howard Mao
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f03ffb32a0
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add top that directly tests the TL -> AXI converters
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2016-07-11 18:11:00 -07:00 |
|
Howard Mao
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b47f8fbc41
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don't use splat and bug out if too many address map entries
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2016-07-11 18:10:42 -07:00 |
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Wesley W. Terpstra
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46fc9744e2
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rocket: add an AXI master port into the chip
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2016-07-11 12:16:44 -07:00 |
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Wesley W. Terpstra
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8ac7fa5544
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ext: support multiple external AHB/AXI ports
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2016-07-11 12:16:39 -07:00 |
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mwachs5
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36720d915a
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Update README.md (#161)
Correct typo in heading
|
2016-07-11 00:34:13 -07:00 |
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Andrew Waterman
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9751ea0f35
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Fix Verilator VCD (#157)
|
2016-07-09 02:37:39 -07:00 |
|
Howard Mao
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9ec55ebb91
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don't add io:ext region to address map if no external MMIO
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2016-07-08 15:29:35 -07:00 |
|
Howard Mao
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35547aa428
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allow NastiConverterTest and Memtest to run simultaneously
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2016-07-08 13:40:52 -07:00 |
|
Howard Mao
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358668699f
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refactoring groundtest configuration
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2016-07-08 11:40:16 -07:00 |
|
Howard Mao
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eeac405ef8
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get rid of TL -> AXI buffering and fix SimpleHellaCacheIF for non-blocking DCache
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2016-07-08 09:33:07 -07:00 |
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Andrew Waterman
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32ee5432dd
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Fix testing of DefaultSmallConfig; bump rocket et al
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2016-07-07 21:23:49 -07:00 |
|
Howard Mao
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8c13e78ab5
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add buffering and locking to TL -> AXI converter
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2016-07-06 16:57:09 -07:00 |
|
Howard Mao
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e27cb5f885
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fix voluntary release issue in L2 cache
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2016-07-06 16:57:01 -07:00 |
|
Andrew Waterman
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2a146155fc
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Update to new priv-1.9 PTE format
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2016-07-06 10:15:59 -07:00 |
|
Howard Mao
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f79a3285fb
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fix TraceGen and Nasti -> TL converter
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2016-07-05 17:42:57 -07:00 |
|
Howard Mao
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c924ec2a22
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fixing bufferless broadcast hub
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2016-07-05 12:10:22 -07:00 |
|
Howard Mao
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af51b6f363
|
bump groundtest and uncore
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2016-07-01 18:13:46 -07:00 |
|
Howard Mao
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b01871c3de
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test configurations for both shrinking and growing TL -> MIF
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2016-07-01 18:13:33 -07:00 |
|
Howard Mao
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e04e3d2571
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make TestBench generator handle different top module names
|
2016-07-01 10:53:08 -07:00 |
|
Howard Mao
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600f2da38a
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export TL interface for Mem/MMIO and fix TL width adapters
|
2016-06-30 18:20:43 -07:00 |
|
Howard Mao
|
39ec927a3f
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replace complicated pattern substitutions with automatic variable
|
2016-06-28 18:30:11 -07:00 |
|
Howard Mao
|
a39a0c0ec4
|
.prm is output of chisel stage, not firrtl stage
|
2016-06-28 17:34:37 -07:00 |
|
Howard Mao
|
b30e0254ee
|
fix Makefrag to detect all Chisel source files
|
2016-06-28 16:39:10 -07:00 |
|
Howard Mao
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ebef4ddad0
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remove mention of HTIF from README
|
2016-06-28 15:23:32 -07:00 |
|
Andrew Waterman
|
f1cbb2ff77
|
Turn up optimization for Verilator compilation
|
2016-06-28 14:12:46 -07:00 |
|
Howard Mao
|
74cd588c65
|
refactor uncore to split into separate packages
|
2016-06-28 14:10:25 -07:00 |
|
Andrew Waterman
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c725a78086
|
Merge RTC into PRCI
|
2016-06-27 23:08:29 -07:00 |
|
Howard Mao
|
d10fc84a8b
|
no longer require caching interfaces for groundtest tiles
|
2016-06-27 17:32:49 -07:00 |
|
Howard Mao
|
2dd8d90ae4
|
make Comparator fit the GroundTest model
|
2016-06-27 16:01:32 -07:00 |
|
Howard Mao
|
800e62412a
|
use the fast version of asm/bmark-tests
|
2016-06-24 15:36:10 -07:00 |
|
Howard Mao
|
d6ba0437ff
|
merge different configs into regression suites to reduce travis build times
|
2016-06-24 13:02:29 -07:00 |
|
Andrew Waterman
|
87a4858aa6
|
Exit from testbench, not C code
Otherwise, we don't get coverage data from the simulator.
|
2016-06-23 20:54:07 -07:00 |
|
Howard Mao
|
4cd709c516
|
fix Comparator in groundtest
|
2016-06-23 15:47:24 -07:00 |
|
Andrew Waterman
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568bfa6c50
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Purge legacy HTIF things
The SCR file is gone, too, because it was tightly coupled. The
general concept could be revived as a module that somehow connects
to the debug module.
|
2016-06-23 13:23:57 -07:00 |
|
Andrew Waterman
|
2d44be747a
|
Fix groundtest without HTIF
|
2016-06-23 12:17:26 -07:00 |
|
Andrew Waterman
|
30331fcaeb
|
Remove HTIF; use debug module for testing in simulation
|
2016-06-23 00:32:05 -07:00 |
|
Howard Mao
|
255ef05e21
|
bump rocket
|
2016-06-22 17:59:05 -07:00 |
|
Howard Mao
|
338f959620
|
get rid of commented out code
|
2016-06-22 17:36:53 -07:00 |
|
Howard Mao
|
4fbe7d6cf7
|
split the isa tests properly
|
2016-06-22 16:14:02 -07:00 |
|
Howard Mao
|
5edb448a1f
|
get rid of slow DualCoreConfig in Travis for now
|
2016-06-22 16:09:14 -07:00 |
|
Howard Mao
|
3c973d429a
|
rename SmallConfig to WithSmallCores
|
2016-06-22 16:08:27 -07:00 |
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