Yunsup Lee
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cfecd8832d
|
tease out reference-chip specific stuff
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2014-09-09 20:49:28 -07:00 |
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Yunsup Lee
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6b6bdd2b83
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decommission Slave top-level module for fpga build
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2014-09-08 00:23:15 -07:00 |
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Yunsup Lee
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ddfd3ce968
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further generalize fpga/vlsi builds
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2014-09-08 00:21:57 -07:00 |
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Yunsup Lee
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3175a40509
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add berkeley-hardfloat as submodule
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2014-09-08 00:18:49 -07:00 |
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Yunsup Lee
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1e5b2f658f
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remove existing hardfloat repository
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2014-09-07 23:45:47 -07:00 |
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Henry Cook
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ae05125f29
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Adjustements to top-level parameters and knobs for hwacha
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2014-09-07 17:57:33 -07:00 |
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Henry Cook
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5eb5e9eaf5
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Standardize ()=>Module(...) top-level Parameters
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2014-09-07 17:54:41 -07:00 |
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Henry Cook
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4126678c9d
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Merge branch 'dse'
Conflicts:
rocket
uncore
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2014-09-06 06:59:14 -07:00 |
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Henry Cook
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5e26b4ab66
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Merge branch 'dse'
Conflicts:
src/main/scala/htif.scala
src/main/scala/llc.scala
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2014-09-06 06:16:58 -07:00 |
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Henry Cook
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5e2f98747f
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Merge branch 'dse'
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2014-09-06 06:10:15 -07:00 |
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Yunsup Lee
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1cb2d1d7b7
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initialize all SRAMs to avoid X propagation problem
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2014-09-04 11:06:01 -07:00 |
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Yunsup Lee
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763c57931b
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fix problem introduced with verilog generation in vsim/fsim
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2014-09-04 09:49:57 -07:00 |
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Scott Beamer
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6c6f5a3843
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add verilog target to build without simulator
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2014-09-03 17:28:45 -07:00 |
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Scott Beamer
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13b6ec4712
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including better sbt fixes
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2014-09-02 15:16:31 -07:00 |
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Scott Beamer
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f8821b4cc9
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better fix with explanation of sbt issue
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2014-09-02 15:16:03 -07:00 |
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Scott Beamer
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600c5d50a9
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better fix with explanation of sbt issue
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2014-09-02 15:14:56 -07:00 |
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Scott Beamer
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26649b30ed
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fixes sbt error during first run
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2014-09-02 14:34:55 -07:00 |
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Scott Beamer
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f9922a106b
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fixes sbt error during first run
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2014-09-02 14:34:36 -07:00 |
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Scott Beamer
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bfb662968d
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fixes sbt error during first run
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2014-09-02 14:33:58 -07:00 |
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Henry Cook
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82467313dd
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merge in rocketchip changes from master
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2014-09-02 13:51:57 -07:00 |
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Henry Cook
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3250db0dd5
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bump uncore
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2014-09-02 12:37:44 -07:00 |
|
Henry Cook
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712f3a754d
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merge in master
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2014-09-02 12:34:42 -07:00 |
|
Henry Cook
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8622eb0f5b
|
bump rocket
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2014-09-01 13:34:15 -07:00 |
|
Henry Cook
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b42a2ab40a
|
Final parameter refactor
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2014-09-01 13:28:58 -07:00 |
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Adam Izraelevitz
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2d6aafc32e
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Merge branch 'dse' of github.com:ucb-bar/rocket-staging into HEAD
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2014-09-01 11:23:50 -07:00 |
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Yunsup Lee
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7734285507
|
forgot to comment out hwacha
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2014-09-01 09:01:36 -07:00 |
|
Yunsup Lee
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0d18e491c7
|
update gitignore
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2014-09-01 08:59:59 -07:00 |
|
Yunsup Lee
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882fecf43a
|
update README
|
2014-08-31 20:57:16 -07:00 |
|
Yunsup Lee
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c03c09ec31
|
update for rocket-chip release
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2014-08-31 20:26:55 -07:00 |
|
Sagar Karandikar
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83c6c2c9e2
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rename refs to zynq-fpga to fpga-zynq
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2014-08-29 10:26:48 -07:00 |
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Henry Cook
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78ab83d224
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refactor fpga top/config
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2014-08-28 13:07:54 -07:00 |
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Scott Beamer
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83380053de
|
use fpga backend for fpga
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2014-08-26 15:56:27 -07:00 |
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Henry Cook
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bf356b9cb4
|
Refactor to combine fpga and vlsi tops, part 1
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2014-08-24 19:30:53 -07:00 |
|
Henry Cook
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17b2359c9a
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htif parameters trait
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2014-08-24 19:27:58 -07:00 |
|
Henry Cook
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a41d55b643
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Final parameter refactor.
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2014-08-23 01:26:03 -07:00 |
|
Henry Cook
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dc5643b12f
|
Final parameter refactor.
|
2014-08-23 01:19:36 -07:00 |
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Scott Beamer
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63b62394d9
|
added l2 to fpga
with new chisel & uncore, it goes into brams
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2014-08-20 15:41:07 -07:00 |
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Scott Beamer
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e384b33cc3
|
don't generate a write mask for BigMem if it isn't used
not needed for llc data
|
2014-08-19 15:50:20 -07:00 |
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Henry Cook
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9b36162b67
|
Point rocket/ to rocket-staging repo
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2014-08-19 14:20:15 -07:00 |
|
Henry Cook
|
2741bbf2b9
|
Point rocket/ to rocket-staging repo
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2014-08-19 13:53:24 -07:00 |
|
Henry Cook
|
6a4193cf90
|
minor cache param cleanup
|
2014-08-19 11:38:46 -07:00 |
|
Henry Cook
|
2de268b3b1
|
Cache utility traits. Completely compiles, asm tests hang.
|
2014-08-19 11:38:20 -07:00 |
|
Henry Cook
|
ca5f38ff26
|
a few more fixes. some param lookups fail (here() in Alter blocks)
|
2014-08-19 11:38:11 -07:00 |
|
Henry Cook
|
0dac9a7467
|
Full conversion to params. Compiles but does not elaborate.
|
2014-08-19 11:38:02 -07:00 |
|
Adam Izraelevitz
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4e6d69892d
|
Added initial brainstorm for parameter hierarchical flattening, does not compile ;)
|
2014-08-19 11:37:50 -07:00 |
|
Adam Izraelevitz
|
812353bace
|
Ported FPU parameters to new Chisel Parameters
|
2014-08-19 11:37:27 -07:00 |
|
Yunsup Lee
|
4ac8e59b1f
|
add .gitignore
|
2014-08-18 19:27:50 -07:00 |
|
Yunsup Lee
|
d520846638
|
add README and sbt files
|
2014-08-18 19:23:10 -07:00 |
|
Scott Beamer
|
e1a4d12c65
|
fix small typos in README
|
2014-08-14 17:59:24 -07:00 |
|
Henry Cook
|
1563c1bb36
|
Fixed cache params. Asm and bmark tests pass.
|
2014-08-12 15:00:54 -07:00 |
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