Howard Mao
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850fa092a4
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refactor how groundtests are configured
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2016-07-08 11:40:01 -07:00 |
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Howard Mao
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f62c74b82a
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allow groundtest to use non-blocking DCache
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2016-07-07 18:59:09 -07:00 |
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Andrew Waterman
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8625f9ea0c
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Update PTE format
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2016-07-06 03:20:41 -07:00 |
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Howard Mao
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80670c08d7
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changes to imports after uncore refactor
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2016-06-28 13:15:56 -07:00 |
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Howard Mao
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f438e7048c
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no longer need DummyCache since tiles no longer require cached interface
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2016-06-27 16:32:06 -07:00 |
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Andrew Waterman
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1844bac5bc
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Use stop() to exit cleanly
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2016-06-23 12:16:37 -07:00 |
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Howard Mao
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fe8d81958f
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fix groundtests to fit new way of parameterizing TileLink clients
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2016-06-13 16:17:27 -07:00 |
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Colin Schmidt
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40b6e44816
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name resetSignal parameter to tile constructor
if the tile constructor were to change groundtest
only needs to be updated if resetSignal is removed or renamed
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2016-06-09 10:20:48 -07:00 |
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Matthew Naylor
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213bb26367
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Drive invalidate_lr signal
The DCache input for invalidating LR reservations was dangling. Now
we wire it to false.
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2016-05-25 13:27:12 +01:00 |
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Howard Mao
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1882e694e4
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only write to a single tohost location
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2016-05-03 20:20:52 -07:00 |
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Howard Mao
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518d510622
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only write out finish from tile 0 in groundtest
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2016-05-03 13:09:22 -07:00 |
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Howard Mao
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b95f095aca
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write to multiple possible tohost locations
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2016-05-02 20:11:20 -07:00 |
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Howard Mao
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4b4e8f7f62
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fixes for priv-1.9 changes
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2016-05-02 18:25:02 -07:00 |
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Howard Mao
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3b0e87f42a
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pass CSRs through to ground test and get DMA tests working again
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2016-03-22 20:18:02 -07:00 |
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Howard Mao
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7b7e954133
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make sure DummyPTW does not invalidate the TLB
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2016-03-22 19:59:58 -07:00 |
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Andrew Waterman
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13dcb96b7f
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Update TLB interface
n.b. no need to set mprv, since prv = S.
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2016-03-14 17:55:19 -07:00 |
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Howard Mao
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428fa14601
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fix DummyPTW response
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2016-01-27 15:33:02 -08:00 |
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Howard Mao
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a59ff38b67
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use MMIO for DMA requests instead of separate channel
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2016-01-27 15:33:02 -08:00 |
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Howard Mao
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04e1f8c5c3
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lowercase SMI to Smi
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2016-01-11 16:18:49 -08:00 |
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Howard Mao
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24eecee148
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add DMA test
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2015-12-16 21:26:22 -08:00 |
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Howard Mao
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640544ea5a
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generalize test harness
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2015-11-18 22:54:05 -08:00 |
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Howard Mao
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8bc90ab9bd
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separate out common functionality
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2015-11-18 20:53:19 -08:00 |
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Howard Mao
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7cae6cedf5
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finished bit should be set true if generator not being used
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2015-11-11 18:51:16 -08:00 |
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Howard Mao
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644b66a3a8
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selectively enable or disable uncached and cached generators
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2015-10-31 17:43:25 -07:00 |
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Howard Mao
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c1f42ce3d4
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add an L1 cache request generator
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2015-10-30 12:49:57 -07:00 |
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Howard Mao
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3103fa8da2
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rename tl to mem in generator
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2015-10-27 17:14:56 -07:00 |
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Howard Mao
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aeb9c86459
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use the uncached port instead of the cached port
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2015-10-26 23:09:36 -07:00 |
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Howard Mao
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2b252bc6ff
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first commit
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2015-10-26 21:43:50 -07:00 |
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