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Commit Graph

5114 Commits

Author SHA1 Message Date
Megan Wachs
e22b01a6fa jtag_dtm: Update regression to run and pass. 2017-01-18 12:08:13 -08:00
Henry Cook
1b31dfa700 Update sbt to 13.12 (#514)
Closes #496
2017-01-17 16:26:22 -08:00
Henry Cook
9a6634cd40 Add TLBuffers on the L1 backends and blind exit points (#513)
* [coreplex] add TLBuffers on the exit points from the Tile and Coreplex
* [config] WithBootROMFile
2017-01-17 11:57:23 -08:00
Henry Cook
74b6a8d02b Refactor Tile to use cake pattern (#502)
* [rocket] Refactor Tile into cake pattern with traits
* [rocket] cacheDataBits &etc in HasCoreParameters
* [rocket] pass TLEdgeOut implicitly rather than relying on val edge in HasCoreParameters
* [rocket] frontend and icache now diplomatic
* [rocket] file name capitalization
* [rocket] re-add hook for inserting externally-defined Cores
* [rocket] add FPUCoreIO
* [groundtest] move TL1 Config instances to where they are used
* [unittest] remove legacy unit tests
* [groundtest] remove legacy device tests
2017-01-16 18:24:08 -08:00
Minux Ma
622e311962 Fix emulator argument processing for unknown DTM arguments (#498)
Revision 7e79421 (issue #484) makes emulator.cc rejecting any unrecognized
+arg "legacy" arguments, however, this breaks riscv-torture emulator tests
as it needs to pass +signature to the DTM.

I think it is actually impossible to check for unknown argument here
unless we hardcode a list of all arguments recognized by fesrv. Fix this
issue by passing all arguments starting with the first unknown argument
to DTM.

Updates #484.

Signed-off-by: Minux Ma <minux.ma@gmail.com>
2017-01-16 13:42:45 -08:00
GuzTech
8157cf1ede Perform integer division when parsing rocketchip.DefaultConfig.conf (#493) 2017-01-13 16:40:02 -08:00
Wesley W. Terpstra
52bb6cd9d9 Configs: use a uniform syntax without Match exceptions (#507)
* Configs: use a uniform syntax without Match exceptions

The old style of specifying Configs used total functions.  The only way to
indicate that a key was not matched was to throw an exception.  Not only was
this a performance concern, but it also caused confusing error messages
whenever you had a match failure from a lookup within a lookup.  The
exception could get handled by an outer-lookup that then reported the wrong
key as missing.
2017-01-13 14:41:19 -08:00
Jacob Chang
b448387899 Merge pull request #508 from ucb-bar/jchang
Add iterator function to LazyModule to iterate over all nodes
2017-01-13 10:09:50 -08:00
Jacob Chang
59eb7c24ee Add iterator function to LazyModule to iterate over all nodes 2017-01-12 15:21:10 -08:00
Andrew Waterman
f1cb06142e bump tools 2017-01-11 13:21:55 -08:00
Andrew Waterman
71c4b000b3 Don't special-case power-of-2 replacement policy for BTB
PLRU wasn't implemented correctly for the BTB, since it wasn't
increasing the priority on replacement, only on usage.  Regardless,
this should be a second-order effect, so using FIFO always is fine.
2017-01-11 13:21:55 -08:00
Jacob Chang
c531093898 Fix bug introduced with Fuzzer when nOperations is power of 2 (#492) 2016-12-15 19:10:53 -08:00
Wesley W. Terpstra
4471e0de27 Merge pull request #494 from ucb-bar/diplomatic-apb
Diplomatic apb
2016-12-15 17:45:20 -08:00
Wesley W. Terpstra
a9b264e582 ahb: lower hsel when idle to save power 2016-12-15 15:32:30 -08:00
Wesley W. Terpstra
16febe7e94 apb: add a TileLink to APB bridge and unittest it 2016-12-15 15:32:27 -08:00
Wesley W. Terpstra
ed091f55e6 apb: diplomatic APB framework 2016-12-15 13:48:50 -08:00
Wesley W. Terpstra
4d87d07343 Merge pull request #491 from ucb-bar/ahb-hready-high
ahb: don't violate spec with SRAM fuzzing
2016-12-15 02:50:15 +00:00
Wesley W. Terpstra
a5b8fc2317 RegisterRouterTest: start up with 0 in registers to make VIP testing easier 2016-12-14 15:38:08 -08:00
Wesley W. Terpstra
9d50704b64 ahb: don't violate spec with SRAM fuzzing 2016-12-14 15:18:41 -08:00
Jacob Chang
1a0021b818 Merge pull request #489 from ucb-bar/jchang_test
Changes made to diplomacy for feature support + bug fix in Fragmenter and fuzzer + support infinite traffic in fuzzer
2016-12-13 18:46:58 -08:00
Jacob Chang
ebd075d279 Merge branch 'master' into jchang_test 2016-12-13 15:30:49 -08:00
Schuyler Eldridge
7e794212d9 Cleanup emulator.cc, use getopt, add help text (#487)
This changes the emulator to conform to POSIX-style options (e.g.,
short/'-' and long/'--') while preserving legacy option parsing (i.e.,
'+'). Options are read from the user until the first
non-option (either POSIX or legacy) is encountered. This and
everything following is assumed to be the binary and any arguments the
user wants to run on the emulator. All non-options are passed directly
to the DTM. This allows for the same option to be passed, safely, to
both the emulator and the binary, e.g., "+verbose".

This introduces a dependency on <getopt.h>.

Closes #484.
2016-12-13 14:29:57 -08:00
Jacob Chang
2dd9e522a0 Merge branch 'master' into jchang_test 2016-12-12 20:02:53 -08:00
Henry Cook
540502f96d Convert frontend and icache to diplomacy/tl2 (#486)
* [rocket] file capitalization

* [rocket] cacheDataBits &etc in HasCoreParameters

* [rocket] pass TLEdgeOut implicitly rather than relying on val edge in HasCoreParameters

* [rocket] frontend and icache now diplomatic
2016-12-12 17:38:55 -08:00
Jacob Chang
531f3684ed Removing module list for merging. (will need to create iterator in future) 2016-12-12 16:25:31 -08:00
Jacob Chang
ec425a1d14 Merge with Head 2016-12-12 16:18:37 -08:00
Jacob Chang
b28c0936a0 Merge remote-tracking branch 'origin/master' into jchang_test 2016-12-12 16:18:14 -08:00
Jacob Chang
aae9b23036 Update with paratermized LazyModule 2016-12-12 16:16:56 -08:00
Richard Xia
5244fc8433 Bump torture to get updated submodule URL. (#488) 2016-12-12 13:47:33 -08:00
Henry Cook
c981f8b4f3 More travis job re-balancing (#481)
* [travis] Depend on pre-built docker images rather than travis cache
2016-12-11 22:02:46 -08:00
Jacob Chang
762afcd54a Merge remote-tracking branch 'origin/master' into jchang_test 2016-12-09 16:56:49 -08:00
Jacob Chang
4c3083c181 Remove unnecessary val 2016-12-09 16:44:30 -08:00
Wesley W. Terpstra
09afbbafdb ahb: weaken RegisterRouter assertion
As written I think it could potentially fail, but what I actually care
about is something weaker that should be true. Assert: nothing lost.
2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
588b944ed4 ahb: implement and test address decoding 2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
5d1064fcb1 ahb: include a unit test 2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
51dfb9cb06 ahb: TileLink master 2016-12-08 18:00:39 -08:00
Wesley W. Terpstra
01b0f6a52b ahb: new diplomacy-based AHB bus definition 2016-12-08 18:00:39 -08:00
Jacob Chang
54cc071a64 Fix Fragmenter to ensure logical operations must be sent out atomically.
Edited Fuzzer so that it can generate infinite operations when nOperations is net to 0
2016-12-07 16:22:05 -08:00
Wesley W. Terpstra
1bd8a2e239 Merge pull request #478 from ucb-bar/parameterize-diplomatic-connections
Parameterize diplomatic connections
2016-12-07 15:03:53 -08:00
Wesley W. Terpstra
c2eedbfe23 tilelink2 Monitor: use Parameters instead of global variables 2016-12-07 12:24:03 -08:00
Wesley W. Terpstra
020fbe8be9 diplomacy: make config.Parameters available in bundle connect()
This makes it posisble to use Parameters to control Monitors.
However, we need to make all LazyModules carry Parameters.
2016-12-07 12:24:01 -08:00
Andrew Waterman
915697cb09 Fix FEQ flag generation (#479)
FEQ is not a signaling comparison (i.e., qNaN is not an invalid input).

Also, minor code cleanup.
2016-12-06 11:54:29 -08:00
Wesley W. Terpstra
fbfa15efea TLBroadcast: support non-FIFO devices (#482) 2016-12-05 22:10:37 -08:00
Wesley W. Terpstra
3c9718ec8f clint: undefined registers must be zero (#480)
This is needed so that SMP-safe boot loaders can safely
read/write to the IPI register of non-existent harts.
2016-12-05 17:11:53 -08:00
Henry Cook
f3d0692619 Make a directory for the config package (#464)
* [config] make dir structure mirror packages

* [config] expunge max_int
2016-12-05 10:42:16 -08:00
Henry Cook
d0a0c887dc [tracegen] decrease default address bag size (#462)
while increasing the default number of requests.
2016-12-04 22:46:55 -08:00
Schuyler Eldridge
36fe024671 CacheName no longer needed in RoCCInterface
With dcacheParams passed to a RoCC, the CacheName no longer needs to be
specified.
2016-12-04 19:01:39 -08:00
Schuyler Eldridge
624db2034b Make instantiated RoCC use dcacheParams 2016-12-04 19:01:39 -08:00
Henry Cook
9fb7934a37 WIP PR to figure out why travis is failing (#471)
Make travis use a docker image with pre-built toolchain and verilator
2016-12-04 13:10:13 -08:00
Jacob Chang
9ac78a0d37 Merge branch 'formal_tests' of github.com:ucb-bar/rocket-chip into formal_tests 2016-12-02 14:21:36 -08:00