Colin Schmidt
d0c00eccb9
caches don't transfer across sudo flag changes
2017-05-18 11:33:23 -07:00
Colin Schmidt
617dd6fe1e
try travis suggestion on the jvm stages
2017-05-18 11:06:43 -07:00
Colin Schmidt
66d660ff60
use YAML to condense script replication
2017-05-17 14:41:04 -07:00
Colin Schmidt
0c382204d4
give them all stages
2017-05-17 12:38:52 -07:00
Colin Schmidt
62a54e6bdb
inline the env matrix
2017-05-17 12:36:49 -07:00
Colin Schmidt
2f3e22aff6
matrix outside after jobs
2017-05-17 12:34:11 -07:00
Colin Schmidt
f3775cbbbf
try moving matrix into jobs
2017-05-17 12:31:13 -07:00
Colin Schmidt
b7dc415522
maybe this will order them with deploy last
2017-05-17 12:28:01 -07:00
Colin Schmidt
b9fc169367
try another stages organization
2017-05-17 12:24:41 -07:00
Colin Schmidt
83a5230e91
change install to script?
2017-05-17 12:13:31 -07:00
Colin Schmidt
bce613ce38
try using a new travis staging feature
...
The idea is to let us avoid building the tools
for each SUITE
2017-05-17 11:58:09 -07:00
Colin Schmidt and Henry Cook
9dd12545d0
[Rocket] Send correct type for iomshr reqs
...
Also contain grow param bugfix
2016-11-19 19:04:06 -08:00
Colin Schmidt and Colin Schmidt
85f3788ab5
initialize s2_hit to solve #401
2016-10-21 14:53:55 -07:00
Colin Schmidt and Yunsup Lee
4ac0ef2940
bump torture pointer after sim name change
2016-09-29 10:45:06 -07:00
Colin Schmidt and Andrew Waterman
cf3c6fa277
add STOP_COND to emulator & match vsim PRINTF_COND
2016-09-09 11:07:17 -07:00
Colin Schmidt
254f49093c
only use companion objects for types
2016-09-07 12:32:34 -07:00
Colin Schmidt
ba4b3e14cc
remove remaining dramsim2 files
2016-09-04 17:25:24 -07:00
Colin Schmidt
0a6c05a5d8
connect top level interrupts to coreplex
2016-08-18 15:52:44 -07:00
Colin Schmidt and Palmer Dabbelt
1c2c9f8ed1
bump rocket to fix RoccExampleConfig
2016-06-14 21:21:06 -07:00
Colin Schmidt and Howard Mao
40b6e44816
name resetSignal parameter to tile constructor
...
if the tile constructor were to change groundtest
only needs to be updated if resetSignal is removed or renamed
2016-06-09 10:20:48 -07:00
Colin Schmidt and Henry Cook
3e0b5d6fd9
Ensure that a TSHR doesn't see a valid Acquire if that is blocked by a Release,
...
but would otherwise be allocated.
Closes #45
2016-05-20 16:35:30 -07:00
Colin Schmidt
abb0e2921b
return non-zero exit codes when an assertion fires
...
This ensures that assertion failures, which currently print a message to
the console but return a successful exit code, now will cause non-zero
exit code. This is meant to help automated tools like travis and
buildbot do a better job at catching assertions.
This impacts the various run-* targets in the simulation
directories.
2016-05-18 12:57:58 -07:00
Colin Schmidt
b396c68577
bump torture for priv-1.9 test-env
2016-05-17 22:02:38 -07:00
Colin Schmidt
b0ae003981
add firrtl to regression makefile
...
this makes it easier to test chisel3 builds
e.g. the local buildbot can now test a bunch of configs
2016-05-17 17:34:20 -07:00
Colin Schmidt
8fa2de0816
chisel3 fix to RoCC connections honor last connect
2016-05-05 18:09:48 -07:00
Colin Schmidt and Howard Mao
48170fd9aa
add default cases to configs that use CDEMatchError
...
this avoids filling in the stack trace every time
a config doesn't contain the parameter
2016-04-22 12:14:58 -07:00
Colin Schmidt
b5992186df
include top-level makefrag in regressions
...
fixes issue with rocketchip_addons inclusion
2016-03-16 15:52:28 -07:00
Colin Schmidt
9c7e5bc6c0
bump hardfloat, tools(tests & spike) for fcvt fix
2016-03-01 19:53:26 -08:00
Colin Schmidt
a9380a3dc1
bump hardfloat,uncore,chisel,tools(tests) for sqrt fix
2016-02-29 16:59:55 -08:00
Colin Schmidt
68a49c7700
fetch rocketchip_addons during regression submodule step
2016-02-26 11:05:41 -08:00
Colin Schmidt
ef4915bd2c
make the asm suites ordered by their insertion order
2016-02-24 19:49:35 -08:00
Colin Schmidt
ad81d95751
add run-asm-{p,pt,v}-tests targets for convenience
2016-02-24 19:49:35 -08:00
Colin Schmidt and Palmer Dabbelt
1e49eb4958
format .travis.yml (trigger rebuilt to test cache)
2016-02-23 10:58:51 -08:00
Colin Schmidt and Palmer Dabbelt
e097cdcef8
bump tools for install tests fix
2016-02-23 10:58:51 -08:00
Colin Schmidt
c1b5f71ee7
don't run bmarks in parallel
2016-02-22 13:34:24 -08:00
Colin Schmidt
4ce603e548
Memtest configs should not have a hex file loaded
2016-02-22 12:49:26 -08:00
Colin Schmidt
43c2237ef7
add more memtest configs and remove channel test
2016-02-22 09:38:44 -08:00
Colin Schmidt
0c575403af
only use a single asm test and 1 bmark for memtest
2016-02-22 09:36:53 -08:00
Colin Schmidt
e4c4a90648
add a config to travis for memchannel mux select
2016-02-22 09:36:53 -08:00
Colin Schmidt
3dae576c9e
add travis configs for memtest
2016-02-22 09:36:53 -08:00
Colin Schmidt
c944193e16
add dma configs to travis
2016-02-02 16:06:01 -08:00
Colin Schmidt
8d1afa4197
bump fpga repo
2016-01-09 17:50:29 -08:00
Colin Schmidt
ec4ade988b
[travis] add multiple configs including rocc
2015-11-28 07:17:49 -08:00
Colin Schmidt
86d67051b2
Merge commit 'e31be75' into rocc-fpu-port
2015-10-26 16:29:51 -07:00
Colin Schmidt
854feab08e
add knob and constraint dumping
2015-10-22 17:25:38 -07:00
Colin Schmidt
652fb393a3
Merge remote-tracking branch 'origin/master' into rocc-fpu-port
2015-10-22 16:38:28 -07:00
Colin Schmidt
942f6a7d7f
Merge commit 'd1eae61970f864afe4fde8ca7f75380c70c4658f' into rocc-fpu-port
2015-10-21 17:18:20 -07:00
Colin Schmidt
97f29b1618
Merge remote-tracking branch 'origin/master' into rocc-fpu-port
2015-10-21 11:33:42 -07:00
Colin Schmidt
2cee8c8bec
Merge commit '3c3e35a56e954b35e6ceb17179ebadc52e8d9b3f' into rocc-fpu-port
2015-10-18 13:09:17 -07:00
Colin Schmidt
6f85ed191e
Add rocketchip_addons to the list of chisel srcs requiring rebuild
2015-09-16 12:28:03 -07:00
Colin Schmidt
7ecb936bf5
Remove -j from "make run-bmark-tests" in travis
...
+currently causes inconsistency in build success
+unclear what root cause is
2015-09-16 12:27:05 -07:00
Colin Schmidt
d355d81633
regression script bump for new torture that can produce waveforms
2015-09-14 13:00:54 -07:00
Colin Schmidt
af7336ef8b
blacklist private branches from travis
2015-09-08 15:13:38 -07:00
Colin Schmidt
d292b6cb13
don't connect rocc-fpu-port without rocc accel
2015-09-08 14:44:12 -07:00
Colin Schmidt
1bfd873888
bump chisel version for seqmem setname
2015-08-29 12:53:57 -07:00
Colin Schmidt
cab12635f8
Merge master into rocc-fpu-port
...
ebb33f2f4b658211960a4c6c023c139420c67212
2015-08-06 08:03:10 -07:00
Colin Schmidt
4b6cd7f3eb
Merge branch 'master' of ucb-bar/rocket into rocc-fpu-port for priv1.7
2015-06-03 15:51:53 -07:00
Colin Schmidt
c746ef8702
fix bug in rocc port resp for FPtoInt instructions
2015-05-04 11:20:55 -07:00
Colin Schmidt
a37fad2e9b
Merge branch 'retimeable-frontend' into rocc-fpu-port
2015-04-22 14:23:52 -07:00
Colin Schmidt
1f410ac42c
move fetch buffer into frontend to allow retiming
2015-04-22 11:26:03 -07:00
Colin Schmidt
73fa28521d
Merge branch 'master' of github.com:ucb-bar/rocket into rocc-fpu-port
2015-04-16 15:22:08 -07:00
Colin Schmidt
bd72db92c1
update rocc port to use fdiv/sqrt
2015-04-07 15:02:02 -07:00
Colin Schmidt
887a8de189
Merge branch 'master' of github.com:ucb-bar/rocket into rocc-fpu-port
2015-04-06 13:48:44 -07:00
Colin Schmidt
a369d8f17f
Add fpu port to the rocc interface
2015-04-02 01:30:11 -07:00
Colin Schmidt
e293d89035
fix decodelogic bug for bitwidths >= 64 s/1L/BigInt(1)/
2015-03-10 10:28:05 -07:00
Colin Schmidt
