Ensure that a TSHR doesn't see a valid Acquire if that is blocked by a Release,
but would otherwise be allocated. Closes #45
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@ -87,7 +87,7 @@ trait HasCoherenceAgentWiringHelpers {
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val match_ok = matchOverride.getOrElse(Bool(true))
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in.ready := Mux(no_matches, ready_bits.orR, (match_bits & ready_bits).orR) && alloc_ok && match_ok
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outs.zip(allocs).zipWithIndex.foreach { case((out, a), i) =>
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out.valid := in.valid && match_ok
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out.valid := in.valid && match_ok && alloc_ok
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out.bits := in.bits
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dataOverrides foreach { d => out.bits.data := d(i) }
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a := alloc_bits(i) & no_matches & alloc_ok
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