riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

fix bug in rocc port resp for FPtoInt instructions

Browse Source
This commit is contained in:
Colin Schmidt 2015-05-04 11:20:55 -07:00
parent b9fb1bb46e
commit c746ef8702
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
rocket/src/main/scala/fpu.scala
View File

@ -440,7 +440,7 @@ class FPU extends Module
fpiu.io.in.bits := req
io.dpath.store_data := fpiu.io.out.bits.store
io.dpath.toint_data := fpiu.io.out.bits.toint
when(fpiu.io.out.valid && mem_cp_valid && !(mem_ctrl.div || mem_ctrl.sqrt)){
when(fpiu.io.out.valid && mem_cp_valid && mem_ctrl.toint){
io.cp_resp.bits.data := fpiu.io.out.bits.toint
io.cp_resp.valid := Bool(true)
}