Henry Cook
|
bc2b45da12
|
Fold uncore constants into TileLinkConfiguration, update coherence API
|
2013-08-02 14:55:06 -07:00 |
|
Stephen Twigg
|
c1b1a21a0f
|
If +stats is set when running simv-debug, will only output vcd data when cr28 is high.
|
2013-07-30 16:39:47 -07:00 |
|
Stephen Twigg
|
3132db4f90
|
Add stats PCR (cr28) to be used to flag whether a core is doing 'interesting' activity.
|
2013-07-30 16:36:28 -07:00 |
|
Henry Cook
|
4d916b56e3
|
Bump scala to 2.10.2, sbt to 0.13-RC2, including new launcher. Upgrade reflection in network.scala to 2.10 lib. Constants now obtained from subproject package objects. Give network its own file.
|
2013-07-24 23:28:43 -07:00 |
|
Henry Cook
|
d8440b042a
|
Make compatible with scala 2.10. Refactor constants into package object. Remove networking primitives from package object. Clean up request generators. Chnage ++ to +: for appending to io.incoherent.
|
2013-07-24 23:22:36 -07:00 |
|
Henry Cook
|
9abdf4e154
|
Make compatible with scala 2.10. List.sort deprecated. Refactor constants into package object.
|
2013-07-23 20:27:58 -07:00 |
|
Stephen Twigg
|
3f874342a4
|
Update chisel to appropriate version for reference chip build.
|
2013-07-10 17:08:56 -07:00 |
|
Ben Keller
|
c7bf1aaac9
|
Merge branch 'master' of github.com:ucb-bar/reference-chip
|
2013-07-10 16:01:25 -07:00 |
|
Ben Keller
|
a72e0dc99e
|
Updated riscv-tools reference
|
2013-07-10 16:01:01 -07:00 |
|
Henry Cook
|
2796de01bf
|
new tilelink arbiter types, reduced release xact trackers
|
2013-07-09 15:41:27 -07:00 |
|
Henry Cook
|
db8e5fda9b
|
new tilelink arbiter types, reduced release xact trackers
|
2013-07-09 15:37:42 -07:00 |
|
Henry Cook
|
5c00d0a030
|
new tilelink arbiter type
|
2013-07-09 15:31:46 -07:00 |
|
Andrew Waterman
|
c5f01f3f87
|
update rocket
|
2013-06-15 00:55:34 -07:00 |
|
Andrew Waterman
|
7cc53c7725
|
clean up Str
|
2013-06-15 00:45:53 -07:00 |
|
Andrew Waterman
|
4ae0c68303
|
require -std=c++11, as -std=c++0x doesn't cut it
|
2013-06-14 00:28:42 -07:00 |
|
Henry Cook
|
896179cbb6
|
removed bad mt test
|
2013-06-14 00:14:18 -07:00 |
|
Henry Cook
|
85fbb650c9
|
makefile support for new multithreading tests
|
2013-06-13 15:34:54 -07:00 |
|
Andrew Waterman
|
ae0716fb6d
|
Use chisel printf for logging
|
2013-06-13 10:53:23 -07:00 |
|
Andrew Waterman
|
95c5147dc5
|
Add RISC-V instruction disassembler
|
2013-06-13 10:31:04 -07:00 |
|
Stephen Twigg
|
bd43ca8423
|
Merge branch 'master' of github.com:ucb-bar/reference-chip
|
2013-05-23 17:51:24 -07:00 |
|
Henry Cook
|
c06cbf523b
|
Redo network to use PairedData crossbars when necessary. Hard-coded network types for each message type. Bump chisel, rocket, uncore.
|
2013-05-23 15:26:20 -07:00 |
|
Henry Cook
|
6a69d7d7b5
|
pass closure to generate bank addr
|
2013-05-23 14:58:19 -07:00 |
|
Henry Cook
|
9631b6081e
|
Merge branch 'tilelink-data'
Conflicts:
src/package.scala
|
2013-05-23 14:53:10 -07:00 |
|
Henry Cook
|
cf02f1ef01
|
use new locking round robin arbiter
|
2013-05-23 14:16:50 -07:00 |
|
Henry Cook
|
569d8fd796
|
Merge branch 'tilelink-data'
|
2013-05-23 14:14:40 -07:00 |
|
Henry Cook
|
12205b9684
|
remove obsolete config file reader prototype
|
2013-05-23 14:09:03 -07:00 |
|
Andrew Waterman
|
fe9adfe71b
|
Simplify and correct integer multiplier
|
2013-05-22 17:27:50 -07:00 |
|
Yunsup Lee
|
26ed805862
|
push chisel,riscv-rocket,uncore
linux kernel boots!
|
2013-05-21 19:00:40 -07:00 |
|
Yunsup Lee
|
11133d6d4c
|
clock gate s2 registers in the frontend
|
2013-05-21 18:59:21 -07:00 |
|
Yunsup Lee
|
c837c1d800
|
fix bug in previous JALR commit
on commit tag 9a122c06d1bf11237d7fb0769d454a67bbb7400e
|
2013-05-21 18:28:44 -07:00 |
|
Henry Cook
|
69b508ff39
|
ported caches and htif to use new tilelink
|
2013-05-21 17:21:04 -07:00 |
|
Henry Cook
|
4c1f105ce9
|
added PairedData link type with matching crossbar, ported tilelink and uncore to use
|
2013-05-21 17:19:07 -07:00 |
|
Andrew Waterman
|
28f914c3f2
|
don't JALR to speculatively-bypassed addresses
Technically not necessary, but probably improves performance.
|
2013-05-21 16:56:58 -07:00 |
|
Yunsup Lee
|
dcde377303
|
Fix DM I$ deadlock
BTB predictions were causing infinite miss loops
|
2013-05-20 15:22:58 -07:00 |
|
Andrew Waterman
|
3a1b5f01b2
|
don't take interrupts while they're disabled!
a control bug allowed an interrupt to be taken on the instruction immediately
following an interrupt-disabling instruction (but not thereafter).
|
2013-05-19 23:27:47 -07:00 |
|
Andrew Waterman
|
6eb4c2542a
|
comment out I$ assert for now
|
2013-05-18 18:09:23 -07:00 |
|
Andrew Waterman
|
1dab984231
|
use UFix instead of Bits for arithmetic
|
2013-05-18 00:45:29 -07:00 |
|
Andrew Waterman
|
dfa7a03f73
|
use assert, not Assert
|
2013-05-18 00:45:13 -07:00 |
|
Yunsup Lee
|
f3c78abc2b
|
push riscv-tests
|
2013-05-16 00:51:02 -07:00 |
|
Yunsup Lee
|
e77bde71d0
|
push riscv-tools
|
2013-05-15 12:03:52 -07:00 |
|
Yunsup Lee
|
f0b0867f5a
|
push riscv-tests
|
2013-05-13 19:22:28 -07:00 |
|
Yunsup Lee
|
f13605d2f5
|
push riscv-tools
|
2013-05-13 19:14:57 -07:00 |
|
Yunsup Lee
|
7ba3ab03e2
|
update README
|
2013-05-13 11:19:55 -07:00 |
|
Yunsup Lee
|
5b55cc93af
|
add submodule riscv-tools
|
2013-05-10 11:53:55 -07:00 |
|
Andrew Waterman
|
0672773c1a
|
for now, don't use asserts outside of components
|
2013-05-09 02:14:44 -07:00 |
|
Andrew Waterman
|
e8fcdb56a6
|
update chisel to work around xilinx ise bug
|
2013-05-03 01:47:15 -07:00 |
|
Andrew Waterman
|
d825c9d6e9
|
make fpga Makefile work with updated Makefrag
|
2013-05-02 05:09:45 -07:00 |
|
Andrew Waterman
|
cfa86dba4f
|
add FPGA test bench
The memory models now support back pressure on the response.
|
2013-05-02 04:59:32 -07:00 |
|
Andrew Waterman
|
d2e1828714
|
gracefully kill htif thread, fixing tty stuff
|
2013-05-02 04:59:32 -07:00 |
|
Andrew Waterman
|
d405ffa949
|
assume all I$ grants bear data
|
2013-05-01 21:01:20 -07:00 |
|