Andrew Waterman
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05f19b21d0
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merge multiplier and divider
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2012-12-12 02:22:47 -08:00 |
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Andrew Waterman
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9c857b83f0
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refactor PCR file
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2012-11-27 01:28:06 -08:00 |
|
Andrew Waterman
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352bb464b5
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clock gate X/M and M/W store data registers
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2012-11-26 20:33:41 -08:00 |
|
Andrew Waterman
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de2f28193a
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get rid of more global constants
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2012-11-25 04:24:25 -08:00 |
|
Andrew Waterman
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c036cdc1ea
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add option for 2-cycle load-use delay
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2012-11-24 22:01:08 -08:00 |
|
Andrew Waterman
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29bc361d6c
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remove global constants; disentangle hwacha a bit
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2012-11-17 17:24:08 -08:00 |
|
Andrew Waterman
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5a7777fe4d
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clock gate integer datapath more aggressively
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2012-11-17 06:48:44 -08:00 |
|
Andrew Waterman
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8dce89703a
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new D$ with better QoR and AMO pipelining
Vector unit is disabled because nack handling needs to be fixed.
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2012-11-16 02:39:33 -08:00 |
|
Andrew Waterman
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ff8c736d94
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move icache invalidate out of request bundle
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2012-11-16 01:55:45 -08:00 |
|
Yunsup Lee
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be1980dd2d
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refactored vector queue interface
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2012-11-07 01:15:33 -08:00 |
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Andrew Waterman
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4d1ca8ba3a
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remove more global consts; refactor DTLBs
D$ now contains DTLB. provide full VAddr with initial request.
VU now has its own DTLBs.
|
2012-11-06 08:13:44 -08:00 |
|
Andrew Waterman
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e76892f758
|
remove more global constants
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2012-11-06 02:55:45 -08:00 |
|
Andrew Waterman
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c5b93798fb
|
factor out more global constants
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2012-11-05 23:52:32 -08:00 |
|
Andrew Waterman
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5b20ed71be
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move rd=0 check into bypass logic
before, the check was in the write enable logic, but moving it obviated
an awkward corner case for mtpcr with rd=0.
|
2012-11-05 01:30:57 -08:00 |
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Andrew Waterman
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7380c9fe60
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aggressively clock gate int and fp datapaths
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2012-11-04 16:40:14 -08:00 |
|
Henry Cook
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88ac5af181
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Merged consts-as-traits
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2012-10-16 16:32:35 -07:00 |
|
Andrew Waterman
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197154c485
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use BTB for JALR
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2012-10-16 02:24:37 -07:00 |
|
Andrew Waterman
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661f8e635b
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merge I$, ITLB, BTB into Frontend
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2012-10-16 02:24:37 -07:00 |
|
Henry Cook
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dfdfddebe8
|
constants as traits
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2012-10-07 22:20:03 -07:00 |
|
Henry Cook
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b5ff436092
|
decode constant object split into multiple objects
|
2012-10-05 15:50:42 -07:00 |
|
Andrew Waterman
|
4e44ed7400
|
allow back pressure on IPI requests
|
2012-07-17 22:55:40 -07:00 |
|
Huy Vo
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fd95159837
|
INPUT/OUTPUT orderring swapped
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2012-07-12 18:16:57 -07:00 |
|
Huy Vo
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c975c21e44
|
views removed
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2012-06-06 12:51:26 -07:00 |
|
Huy Vo
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7408c9ab69
|
removing wires
|
2012-05-24 10:42:39 -07:00 |
|
Andrew Waterman
|
faee45bf4c
|
fix setpcr/clearpcr not writing rd
|
2012-05-21 07:25:35 -07:00 |
|
Gage W Eads
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d0bc995c88
|
Fixed IRQ_IPI -> IRQ_TIMER typo
|
2012-05-14 22:25:12 -07:00 |
|
Henry Cook
|
622a801bb1
|
Refactored cpu/cache interface to use nested bundles
|
2012-05-02 11:54:28 -07:00 |
|
Andrew Waterman
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65ff397122
|
improved instruction decoding
it now makes use of don't-cares by performing logic minimization
|
2012-05-01 20:16:36 -07:00 |
|
Huy Vo
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c9c3bd02bc
|
kill mem stage if fpu nacks in mem stage
|
2012-04-01 17:02:32 -07:00 |
|
Andrew Waterman
|
7f254d9670
|
refine FP bugfixes
|
2012-04-01 14:52:33 -07:00 |
|
Huy Vo
|
c7c35322c2
|
two bug fixes to fpu
|
2012-03-31 22:23:51 -07:00 |
|
Andrew Waterman
|
452876af37
|
fence on vvcfg; implement fence.v.g correctly
|
2012-03-27 14:49:00 -07:00 |
|
Andrew Waterman
|
54fa6f660d
|
new supervisor mode
|
2012-03-24 13:03:31 -07:00 |
|
Yunsup Lee
|
aaed0241af
|
get rid of vxcptwait
|
2012-03-21 15:09:04 -07:00 |
|
Yunsup Lee
|
023734175d
|
now fence stalls in decode
|
2012-03-20 17:10:05 -07:00 |
|
Yunsup Lee
|
e450e3aa40
|
fix irt counter bug regarding vector stuff
|
2012-03-20 17:09:54 -07:00 |
|
Yunsup Lee
|
c036fff79c
|
fix id interrupt signal
|
2012-03-19 15:13:57 -07:00 |
|
Yunsup Lee
|
264732556f
|
fixes to match verilog X semantics
|
2012-03-19 03:10:00 -07:00 |
|
Andrew Waterman
|
bd27d0fab2
|
can now take interrupts on stalled instructions
|
2012-03-19 01:02:06 -07:00 |
|
Andrew Waterman
|
c4a91303fb
|
update vector fence names and encoding
|
2012-03-18 20:42:38 -07:00 |
|
Yunsup Lee
|
b793d63182
|
no vector interrupt masking
|
2012-03-17 23:01:06 -07:00 |
|
Yunsup Lee
|
b19d783fbd
|
add vector irq handler
|
2012-03-14 14:15:28 -07:00 |
|
Yunsup Lee
|
040d62f372
|
refactored vector exception handling interface
|
2012-03-13 23:45:34 -07:00 |
|
Yunsup Lee
|
5655dbd5da
|
add vvcfg and vtcfg instructions
|
2012-03-13 23:45:34 -07:00 |
|
Yunsup Lee
|
1ba5e7b865
|
changes to the vector exception interface
|
2012-03-11 21:38:47 -07:00 |
|
Yunsup Lee
|
e42a4c767e
|
don't stall on vector fences, keep replaying
|
2012-03-11 16:29:19 -07:00 |
|
Yunsup Lee
|
44ff22a26f
|
vector exception handler now handles prefetches correctly
|
2012-03-10 12:54:36 -08:00 |
|
Andrew Waterman
|
85504f0ddc
|
fix bug in fence.i and improve test
|
2012-03-09 03:26:05 -08:00 |
|
Yunsup Lee
|
8acbe98f53
|
change how fence.*.cv works, now control processor stalls on the fence instruction
|
2012-03-08 23:32:31 -08:00 |
|
Yunsup Lee
|
e28a551368
|
refactor code related to vector exceptions
- revisied interfaces
- new instructions
|
2012-03-03 15:15:00 -08:00 |
|