Yunsup Lee
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951226f413
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fix slli/slliw encoding bug
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2013-11-21 14:46:31 -08:00 |
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Yunsup Lee
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25fdf9827f
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push tests
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2013-11-21 14:45:59 -08:00 |
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Ben Keller
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c137cf1a46
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Added line to fix race condition in sbt compile; fixed .gitignores
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2013-11-08 15:30:08 -08:00 |
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Yunsup Lee
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bb64c90092
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forgot to put htif into uncore package
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2013-11-07 15:42:21 -08:00 |
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Yunsup Lee
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1d6d4b4e96
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move htif to uncore
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2013-11-07 13:19:19 -08:00 |
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Yunsup Lee
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ad1d8f219e
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push riscv-tools
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2013-11-05 21:10:49 -08:00 |
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Yunsup Lee
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04108270ff
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push riscv-tools
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2013-10-29 22:54:00 -07:00 |
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Andrew Waterman
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a875233be6
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update subrepos
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2013-10-29 21:17:07 -07:00 |
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Andrew Waterman
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3c1d1f7981
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Fix(?) SBT race by defining subproject build order
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2013-10-29 13:27:36 -07:00 |
|
Andrew Waterman
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8c380a7c3a
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Abort "make run" when tests fail
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2013-10-29 13:25:57 -07:00 |
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Andrew Waterman
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c55eee7244
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Pass target machine exit code back to host OS
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2013-10-29 13:24:09 -07:00 |
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Stephen Twigg
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437f7ed4af
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Push hardfloat (ignore target files)
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2013-09-26 20:51:19 -07:00 |
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Henry Cook
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fc9c676fc1
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add chisel and hardfloat back as sub-projects, bump other sub-projects
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2013-09-26 12:01:46 -07:00 |
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Stephen Twigg
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f6d7e22c46
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Push rocket (fix issue with uppermost bit of D$ req tag getting lost)
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2013-09-25 11:52:01 -07:00 |
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Stephen Twigg
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36dfff5ee8
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Adjust Verilog testbench to use new debug_stats_pcr signal that has been exported to the top level. It is the or-reduction of the stats pcr for each core. Push rocket (export stats pcr to top level). This scheme is cleaner than digging into the hierarchy.
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2013-09-25 01:21:41 -07:00 |
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Stephen Twigg
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eb7e6f03b3
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push rocket (AccumulatorExample fixes and documentation)
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2013-09-24 16:33:32 -07:00 |
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Stephen Twigg
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472b947fbe
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push rocket (add option to RocketConfiguration, vm, to turn off virtualk memory)
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2013-09-24 16:16:12 -07:00 |
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Stephen Twigg
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eb03f61058
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Properly ignore target files. Push uncore (properly ignore target files)
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2013-09-24 16:03:28 -07:00 |
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Stephen Twigg
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081fcc4e63
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push rocket (accelerator interface fixes)
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2013-09-24 10:55:22 -07:00 |
|
Stephen Twigg
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fba0ae0fec
|
Push rocket
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2013-09-23 00:26:27 -07:00 |
|
Stephen Twigg
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324a6321bd
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Push tools (improve consistency: these tools will compile/test the new ISA encoding)
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2013-09-22 03:24:11 -07:00 |
|
Stephen Twigg
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2676ea8279
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Push rocket (fix some issues with RoCC although some remain)
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2013-09-22 03:19:43 -07:00 |
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Andrew Waterman
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b7d7ced41b
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Update to new ISA
|
2013-09-21 06:40:23 -07:00 |
|
Huy Vo
|
09247c0e0b
|
fix to sram init pins
|
2013-09-19 20:12:10 -07:00 |
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Andrew Waterman
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42970c9a99
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Update Rocket
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2013-09-15 04:39:52 -07:00 |
|
Andrew Waterman
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628745226c
|
Use spike disassembler riscv-dis if it exists
|
2013-09-15 04:25:53 -07:00 |
|
Andrew Waterman
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80003b3019
|
Support RoCC
|
2013-09-15 04:25:26 -07:00 |
|
Andrew Waterman
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fbdbb01232
|
update to new isa; disable vector tests
|
2013-09-12 17:04:03 -07:00 |
|
Henry Cook
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b42e140e05
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NetworkIOs no longer use thunks
|
2013-09-10 16:23:52 -07:00 |
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Stephen Twigg
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6cde69e95d
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Merge changes from master. This updates rocket more than it should so while the emulator builds, programs will not execute correctly due to ISA changes, etc.
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2013-09-09 14:31:18 -07:00 |
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Stephen Twigg
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f27c0fb010
|
Merge commit '2bd4a66eee572252ba6250f9bddada51657fc379' into chisel-v2
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2013-09-05 15:01:56 -07:00 |
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Stephen Twigg
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69daae0dae
|
Add dependency resolvers to build.scala to fix build script
|
2013-09-05 14:56:41 -07:00 |
|
Yunsup Lee
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2c47b4388a
|
push rocket
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2013-08-26 14:54:49 -07:00 |
|
Yunsup Lee
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9003bc2614
|
push rocket
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2013-08-24 22:42:57 -07:00 |
|
Yunsup Lee
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d0674af13f
|
forgot to push riscv-rocket
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2013-08-24 22:15:38 -07:00 |
|
Yunsup Lee
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ba9bbc27df
|
apply same change to fpga top-level
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2013-08-24 15:50:03 -07:00 |
|
Yunsup Lee
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76cd90fc01
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parameterize number of SCRs
|
2013-08-24 15:47:42 -07:00 |
|
Yunsup Lee
|
694ebd65cf
|
push uncore
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2013-08-24 15:24:25 -07:00 |
|
Yunsup Lee
|
0884bc9789
|
fix DRAMSideLLCNull entries
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2013-08-24 13:20:38 -07:00 |
|
Yunsup Lee
|
1e3ac0afa9
|
back to NTILES=1
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2013-08-24 13:10:30 -07:00 |
|
Henry Cook
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6aa500fc16
|
dont make assumptions about default project name when invoking sbt
|
2013-08-20 12:56:01 -07:00 |
|
Henry Cook
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b06d33da2f
|
Canonicalized sbt, updated makefiles, cleaned up submodules, minor bugfixes
|
2013-08-19 19:54:41 -07:00 |
|
Henry Cook
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85e5ce046f
|
pulled submodule commits, uncore sbt standardized
|
2013-08-15 17:07:13 -07:00 |
|
Henry Cook
|
6b20556661
|
Merge branch 'chisel-v2' of github.com:ucb-bar/reference-chip into chisel-v2
Conflicts:
chisel
riscv-hwacha
riscv-rocket
uncore
|
2013-08-15 16:39:30 -07:00 |
|
Henry Cook
|
784e017bae
|
Final Reg standardization
|
2013-08-15 16:37:58 -07:00 |
|
Henry Cook
|
9b70ecf546
|
Reg standardization
|
2013-08-13 17:53:19 -07:00 |
|
Huy Vo
|
d7d13255db
|
chisel tag
|
2013-08-12 20:53:29 -07:00 |
|
Huy Vo
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f9d1403a92
|
tags
|
2013-08-12 20:53:17 -07:00 |
|
Huy Vo
|
cc6631ae4d
|
reset -> _reset
|
2013-08-12 20:52:55 -07:00 |
|
Henry Cook
|
11e131af47
|
initial attempt at upgrade
|
2013-08-12 10:46:22 -07:00 |
|