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2013-09-22 03:19:43 -07:00
csrc update to new isa; disable vector tests 2013-09-12 17:04:03 -07:00
dramsim2@0b3ee6799a integrate updated rocket/uncore 2012-10-18 17:51:41 -07:00
emulator Update to new ISA 2013-09-21 06:40:23 -07:00
project Add dependency resolvers to build.scala to fix build script 2013-09-05 14:56:41 -07:00
riscv-tests@8dd97c2e7a Update to new ISA 2013-09-21 06:40:23 -07:00
riscv-tools@4806a4a74e Updated riscv-tools reference 2013-07-10 16:01:01 -07:00
rocket@8d13409709 Push rocket (fix some issues with RoCC although some remain) 2013-09-22 03:19:43 -07:00
src/main/scala Update to new ISA 2013-09-21 06:40:23 -07:00
uncore@7e10b5d822 fix to sram init pins 2013-09-19 20:12:10 -07:00
.gitmodules Canonicalized sbt, updated makefiles, cleaned up submodules, minor bugfixes 2013-08-19 19:54:41 -07:00
Makefrag Use spike disassembler riscv-dis if it exists 2013-09-15 04:25:53 -07:00
README update README 2013-05-13 11:19:55 -07:00
sbt-launch.jar Bump scala to 2.10.2, sbt to 0.13-RC2, including new launcher. Upgrade reflection in network.scala to 2.10 lib. Constants now obtained from subproject package objects. Give network its own file. 2013-07-24 23:28:43 -07:00

Quick and dirty instructions:

CHECKOUT THE CODE:

  git submodule update --init

  cd riscv-tools
  git submodule update --init


BUILDING THE TOOLCHAIN:

  To build RISC-V ISA simulator, frontend server, proxy kernel and newlib based GNU toolchain:

    export RISCV=/path/to/riscv/toolchain/installation
    cd riscv-tools
    ./build.sh

  To build asm tests and benchmarks (you must have the RISC-V toolchain installed and in your path):

    cd riscv-tests/isa/
    make -j

    cd riscv-tests/benchmarks
    make -j

BUILDING THE PROJECT:

  To build the C simulator:

    cd emulator
    make

  To build the VCS simulator:

    cd vlsi/build/vcs-sim-rtl
    make

  in either case, you can run a set of assembly tests or simple benchmarks:

    make run-asm-tests
    make run-vecasm-tests
    make run-vecasm-timer-tests
    make run-bmarks-test

  To build a C simulator that is capable of VCD waveform generation:

    cd emulator
    make emulator-debug

  And to run the assembly tests on the C simulator and generate waveforms:

    make run-asm-tests-debug
    make run-vecasm-tests-debug
    make run-vecasm-timer-tests-debug
    make run-bmarks-test-debug


UPDATING TO A NEWER VERSION OF CHISEL:

  To grab a newer version of chisel:

    git submodule update --init
    cd chisel
    git pull origin master

  Then, to compile it and install it into the rocket repo:

    cd sbt
    sbt package
    cp chisel/target/scala-2.8.1/chisel_2.8.1-1.1.jar ../../sbt/work/lib

  If you commit a new jar, you must also commit the updated chisel submodule.