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Commit Graph

778 Commits

Author SHA1 Message Date
Yunsup Lee
6495d0e6f7 bump rocket,uncore 2014-09-17 11:26:12 -07:00
Yunsup Lee
041a362943 push chisel 2014-09-17 11:12:12 -07:00
Yunsup Lee
221007595b allow BACKEND/CONFIG be environment variables 2014-09-17 11:12:08 -07:00
Adam Izraelevitz
484648d9c7 Changed CONFIG from a recursively expanded variable to a conditionally
assigned variable, allowing users to define CONFIG external to Makefile
2014-09-17 11:12:02 -07:00
Yunsup Lee
ef2e96211c bump chisel/hardfloat/rocket/uncore 2014-09-12 18:10:00 -07:00
Yunsup Lee
09de2e2794 compute number of outstanding misses for DRAMSideLLCNull 2014-09-12 18:09:38 -07:00
Yunsup Lee
e40a6fdd64 more tweaks to README 2014-09-12 10:22:00 -07:00
Yunsup Lee
c57dea415c fix markdown 2014-09-12 10:18:14 -07:00
Yunsup Lee
1cfd9f5a0e add LICENSE 2014-09-12 10:15:04 -07:00
Stephen Twigg
2367b7beb5 Added logic to sbt so that, for rocketchip, it will automatically include src/main/scala sources from subdirectories into the rocketchip top-level project not already handled by formal subprojects 2014-09-12 01:08:11 -07:00
Yunsup Lee
2c33852c52 final touches 2014-09-12 00:19:29 -07:00
Yunsup Lee
275b72368b add CONFIG to the name of simulator executable 2014-09-11 22:11:58 -07:00
Yunsup Lee
c98afa1fea turn off DRAMSideLLC 2014-09-11 22:10:25 -07:00
Yunsup Lee
b5a64487eb turn off DRAMSideLLC 2014-09-11 22:07:44 -07:00
Yunsup Lee
9dfaf5459e bump hardfloat,riscv-tools 2014-09-11 03:08:21 -07:00
Yunsup Lee
5f8bd18fac Makefiles should be perfect 2014-09-11 02:53:46 -07:00
Yunsup Lee
bb22ecc8b5 fix rocket interrupt issue
h/t Andrew
2014-09-11 02:52:05 -07:00
Yunsup Lee
086bb02c24 check RISCV envirnoment variable 2014-09-11 02:38:21 -07:00
Yunsup Lee
02c08a156f generate consts.vh from chisel source 2014-09-10 17:14:55 -07:00
Yunsup Lee
cfecd8832d tease out reference-chip specific stuff 2014-09-09 20:49:28 -07:00
Yunsup Lee
6b6bdd2b83 decommission Slave top-level module for fpga build 2014-09-08 00:23:15 -07:00
Yunsup Lee
ddfd3ce968 further generalize fpga/vlsi builds 2014-09-08 00:21:57 -07:00
Yunsup Lee
3175a40509 add berkeley-hardfloat as submodule 2014-09-08 00:18:49 -07:00
Yunsup Lee
1e5b2f658f remove existing hardfloat repository 2014-09-07 23:45:47 -07:00
Henry Cook
ae05125f29 Adjustements to top-level parameters and knobs for hwacha 2014-09-07 17:57:33 -07:00
Henry Cook
4126678c9d Merge branch 'dse'
Conflicts:
	rocket
	uncore
2014-09-06 06:59:14 -07:00
Yunsup Lee
1cb2d1d7b7 initialize all SRAMs to avoid X propagation problem 2014-09-04 11:06:01 -07:00
Yunsup Lee
763c57931b fix problem introduced with verilog generation in vsim/fsim 2014-09-04 09:49:57 -07:00
Scott Beamer
6c6f5a3843 add verilog target to build without simulator 2014-09-03 17:28:45 -07:00
Scott Beamer
13b6ec4712 including better sbt fixes 2014-09-02 15:16:31 -07:00
Scott Beamer
26649b30ed fixes sbt error during first run 2014-09-02 14:34:55 -07:00
Henry Cook
82467313dd merge in rocketchip changes from master 2014-09-02 13:51:57 -07:00
Henry Cook
3250db0dd5 bump uncore 2014-09-02 12:37:44 -07:00
Henry Cook
8622eb0f5b bump rocket 2014-09-01 13:34:15 -07:00
Yunsup Lee
7734285507 forgot to comment out hwacha 2014-09-01 09:01:36 -07:00
Yunsup Lee
0d18e491c7 update gitignore 2014-09-01 08:59:59 -07:00
Yunsup Lee
882fecf43a update README 2014-08-31 20:57:16 -07:00
Yunsup Lee
c03c09ec31 update for rocket-chip release 2014-08-31 20:26:55 -07:00
Henry Cook
78ab83d224 refactor fpga top/config 2014-08-28 13:07:54 -07:00
Scott Beamer
83380053de use fpga backend for fpga 2014-08-26 15:56:27 -07:00
Henry Cook
bf356b9cb4 Refactor to combine fpga and vlsi tops, part 1 2014-08-24 19:30:53 -07:00
Henry Cook
a41d55b643 Final parameter refactor. 2014-08-23 01:26:03 -07:00
Scott Beamer
63b62394d9 added l2 to fpga
with new chisel & uncore, it goes into brams
2014-08-20 15:41:07 -07:00
Henry Cook
9b36162b67 Point rocket/ to rocket-staging repo 2014-08-19 14:20:15 -07:00
Henry Cook
2741bbf2b9 Point rocket/ to rocket-staging repo 2014-08-19 13:53:24 -07:00
Scott Beamer
e1a4d12c65 fix small typos in README 2014-08-14 17:59:24 -07:00
Henry Cook
1563c1bb36 Fixed cache params. Asm and bmark tests pass. 2014-08-12 15:00:54 -07:00
Henry Cook
910c886837 bump chisel 2014-08-12 14:53:19 -07:00
Henry Cook
74796868e7 chisel bump 2014-08-12 10:58:09 -07:00
Henry Cook
0ca24a5d91 fix debug flags 2014-08-12 10:35:39 -07:00