Wesley W. Terpstra
d25ad10592
diplomacy: require masters to have a name
2017-06-02 15:52:20 -07:00
Wesley W. Terpstra
ae8734da05
diplomacy: report cacheability in ResourceAddress
2017-06-02 14:27:40 -07:00
Wesley W. Terpstra
eb14329c63
tilelink2: only combine managers of the same resources
2017-06-01 15:34:43 -07:00
Wesley W. Terpstra
0fe625c52f
diplomacy: improve PMA circuit QoR
2017-06-01 15:30:20 -07:00
Wesley W. Terpstra
40f18e6e43
diplomacy: optimize IdRange overlap detection
2017-05-01 22:53:41 -07:00
Henry Cook
ca435c2f40
uncore: more verbose requires
2017-04-25 11:11:31 -07:00
Megan Wachs
43804726ac
tilelink2: more helpful requirement message
2017-03-27 21:05:05 -07:00
Wesley W. Terpstra
bd08f10816
tilelink2: make sink ids optional ( #607 )
...
* tilelink2: make sink ids optional
* CacheCork: add a special-case for 1 sink id
2017-03-23 18:19:04 -07:00
Wesley W. Terpstra
fd521c56a6
tilelink2: add client-side FIFO parameterization
2017-03-21 11:16:51 -07:00
Wesley W. Terpstra
431cb41e27
tilelink2 Parameters: clarify client minLatency is B=>C, not D=>E
2017-03-20 14:49:22 -07:00
Wesley W. Terpstra
d98fd942f1
tilelink2: optimize the supportsX check circuits
2017-03-14 18:34:17 -07:00
Wesley W. Terpstra
d3c5318714
build: remove the now obsolete config string
2017-03-02 21:19:23 -08:00
Wesley W. Terpstra
7f6a250dbf
tilelink2: add hooks for Resources
2017-03-02 21:19:19 -08:00
Wesley W. Terpstra
924afebbd9
tilelink2: make TLRational have configurable direction
2017-02-17 13:59:54 +01:00
Henry Cook
e8c8d2af71
Heterogeneous Tiles ( #550 )
...
Fundamental new features:
* Added tile package: This package is intended to hold components re-usable across different types of tile. Will be the future location of TL2-RoCC accelerators and new diplomatic versions of intra-tile interfaces.
* Adopted [ModuleName]Params convention: Code base was very inconsistent about what to name case classes that provide parameters to modules. Settled on calling them [ModuleName]Params to distinguish them from config.Parameters and config.Config. So far applied mostly only to case classes defined within rocket and tile.
* Defined RocketTileParams: A nested case class containing case classes for all the components of a tile (L1 caches and core). Allows all such parameters to vary per-tile.
* Defined RocketCoreParams: All the parameters that can be varied per-core.
* Defined L1CacheParams: A trait defining the parameters common to L1 caches, made concrete in different derived case classes.
* Defined RocketTilesKey: A sequence of RocketTileParams, one for every tile to be created.
* Provided HeterogeneousDualCoreConfig: An example of making a heterogeneous chip with two cores, one big and one little.
* Changes to legacy code: ReplacementPolicy moved to package util. L1Metadata moved to package tile. Legacy L2 cache agent removed because it can no longer share the metadata array implementation with the L1. Legacy GroundTests on life support.
Additional changes that got rolled in along the way:
* rocket: Fix critical path through BTB for I$ index bits > pgIdxBits
* coreplex: tiles connected via :=*
* groundtest: updated to use TileParams
* tilelink: cache cork requirements are relaxed to allow more cacheless masters
2017-02-09 13:59:09 -08:00
Wesley W. Terpstra
9dc7f180b6
diplomacy: support zero-port Nodes
2017-01-19 19:08:01 -08:00
Wesley W. Terpstra
bf7823f1c8
tilelink2: split suportsAcquire into T and B variants
2017-01-19 19:07:13 -08:00
Wesley W. Terpstra
b7963eca4e
copyright: ran scripts/modify-copyright
2016-11-27 22:15:43 -08:00
Wesley W. Terpstra
ba3c83287f
tilelink2 Xbar: merge the AddressSets of fractured managers
2016-11-03 22:18:28 -07:00
Wesley W. Terpstra
55326c29bb
tilelink2: Filter adapter removes some of the address space
2016-11-03 22:18:23 -07:00
Wesley W. Terpstra
d067e87a7d
tilelink2 Parameters: sinkId is per port, not per manager
2016-11-03 14:37:17 -07:00
Wesley W. Terpstra
4c815f7958
tilelink2 Parameters: fix {contains,supports}Safe ( #416 )
...
When there is only one manager, you still want to know if the address
was wrong on the link to that manager!
2016-10-24 20:37:04 -07:00
Wesley W. Terpstra
a82cfb8306
tilelink2: replace addr_hi with address ( #397 )
...
When faced with ambiguous routing of wmask=0, we decided to include
all the address bits. Hopefully in most cases the low bits will be
optimized away anyway.
2016-10-14 14:09:39 -07:00
Wesley W. Terpstra
dc26736f32
axi4 tilelink2: include minAlignment and maxAddress in slaves
2016-10-12 17:02:01 -07:00
Wesley W. Terpstra
6336f94fa2
tilelink2: only caches can support B requests
2016-10-11 22:38:02 -07:00
Wesley W. Terpstra
f05298d9bc
tilelink2: move general-purpose code out of tilelink2 package
2016-10-03 16:22:28 -07:00
Wesley W. Terpstra
c85e42a303
tilelink2: Nodes should accept full PortParameters
...
We need this for terminal clients/managers that bridge multiple
non-TL2 devices.
2016-10-03 16:09:49 -07:00
Wesley W. Terpstra
8e4c1e567c
tilelink2: add types for a TL clockless interface
2016-09-29 17:33:11 -07:00
Wesley W. Terpstra
02ce8c2ca4
tilelink2 Nodes: rename RootNode => BaseNode
2016-09-29 17:33:11 -07:00
Wesley W. Terpstra
f2e438833c
tilelink2 Nodes: generalize a node into inner and outer halves
...
This lets us create nodes which transform from one bus to another.
2016-09-29 17:33:11 -07:00
Wesley W. Terpstra
72c205b54f
tilelink2 AddressSet: add .misaligned(low, size) helper method ( #345 )
...
This helps devices with misaligned ranges still connect to TL2.
2016-09-26 16:01:09 -07:00
Wesley W. Terpstra
47843d8ec1
tilelink2: maxLgSize should be accurate ( #332 )
2016-09-22 22:06:22 -07:00
Wesley W. Terpstra
44277c1db3
tilelink2 Parameters: include a minLatency parameter for optimization
2016-09-22 15:18:54 -07:00
Wesley W. Terpstra
f5d604d8f8
tilelink2 Parameters: poison ports with unsafe atomics
...
We need to detect if an AtomicAutomata's output ever gets mixed
with some other source of operations.
2016-09-22 15:18:53 -07:00
Wesley W. Terpstra
b11839f5a1
tilelink2: differentiate fast/safe address lookup cases
2016-09-17 17:04:18 -07:00
Wesley W. Terpstra
76d8ed6a69
tilelink2: remove 'strided'; !contiguous is clearer
2016-09-17 16:14:25 -07:00
Wesley W. Terpstra
fa0f119f3c
tilelink2: consider the implications of negative address mask
2016-09-17 16:14:22 -07:00
Wesley W. Terpstra
a357c1d42e
tilelink2: create DTS for devices automagically
2016-09-16 17:28:47 -07:00
Wesley W. Terpstra
2210e71f42
tilelink2 AddressDecoder: validate output of optimization
2016-09-16 16:09:00 -07:00
Wesley W. Terpstra
6b1c57aedc
tilelink2: compute minimal decisive mask
2016-09-15 21:28:56 -07:00
Wesley W. Terpstra
ddd93871d8
tilelink2: add an executable manager parameter
2016-09-15 21:28:55 -07:00
Wesley W. Terpstra
33a05786db
tilelink2 RAMModel: fix put, get, putAck, getAck case ( #282 )
...
This case should result in undefined data for the Get.
It was previously requiring the Get to return the new Put data,
which is only guaranteed by a FIFO device.
2016-09-13 15:44:36 -07:00
Wesley W. Terpstra
94761f714d
tilelink2 HintHandler: fill in correct sink in responses
2016-09-12 17:26:40 -07:00
Wesley W. Terpstra
ca5f98f138
tilelink2: Hints are not special
...
Hints have a TransferSize limit just like all other message types.
2016-09-12 17:15:28 -07:00
Wesley W. Terpstra
26f9e2dfbd
tilelink2 Parameters: fix width=1 address truncation bug
2016-09-12 10:32:24 -07:00
Wesley W. Terpstra
488b93d146
tilelink2 Parameters: if you support PutPartial, you must support PutFull
2016-09-12 10:32:24 -07:00
Wesley W. Terpstra
d2421654c4
tilelink2: refactor address into addr_hi on ABC and addr_lo on CD
...
We need addr_lo in order to properly convert widths.
As part of the refactoring, move all methods out of the Bundles
2016-09-06 23:46:44 -07:00
Wesley W. Terpstra
314d6ebd6f
tilelink2: stricter TransferSizes requirements
2016-09-05 22:10:28 -07:00
Wesley W. Terpstra
ded246fb95
tilelink2: relax max transfer size; the real requirement is not exceeding alignment
2016-09-05 20:58:41 -07:00
Wesley W. Terpstra
df32cc3887
tilelink2: be careful; apply Andrew's masking trick everywhere
2016-09-05 20:58:41 -07:00