Andrew Waterman
4e5f874266
update to new chisel/hwacha
2012-06-08 00:13:14 -07:00
Andrew Waterman
7f6319047e
update to new scala/chisel/Mem
2012-06-06 02:47:22 -07:00
Huy Vo
7408c9ab69
removing wires
2012-05-24 10:42:39 -07:00
Andrew Waterman
65ff397122
improved instruction decoding
...
it now makes use of don't-cares by performing logic minimization
2012-05-01 20:16:36 -07:00
Andrew Waterman
5819beed64
use parameterized FP units
2012-05-01 01:25:43 -07:00
Andrew Waterman
7f254d9670
refine FP bugfixes
2012-04-01 14:52:33 -07:00
Huy Vo
c7c35322c2
two bug fixes to fpu
2012-03-31 22:23:51 -07:00
Andrew Waterman
7eb73c325e
fix signedness of zero fmul results
...
We were using the FMA unit to compute rs1 * rs2 + 0.0 for fmul,
which incorrectly computes +0.0 when rs1 * rs2 == -0.0. Now we
add -0.0 if rs1*rs2 is negative.
2012-03-10 00:21:51 -08:00
Yunsup Lee
8678b3d70c
clean up ioDecoupled/ioPipe interface
2012-03-01 20:48:46 -08:00
Yunsup Lee
20d0088f66
temporary fix to match bit widths for Mem
2012-02-29 17:09:31 -08:00
Yunsup Lee
94ba32bbd3
change package name and sbt project name to rocket
2012-02-25 17:09:26 -08:00
Andrew Waterman
5332bab6f1
expose FMA ports outside of FPU (for the VU)
2012-02-23 17:39:34 -08:00
Andrew Waterman
0ec7767c13
declaring success on FPU for now
2012-02-14 19:11:57 -08:00
Andrew Waterman
38c67e5a9e
add fmin.[s|d] and fmax.[s|d]
2012-02-14 06:37:18 -08:00
Andrew Waterman
ee9fc10668
add fcvt.s.d, fcvt.d.s
2012-02-14 06:03:43 -08:00
Andrew Waterman
ce202c73d1
add fsgnj[n|x].[s|d]
2012-02-14 04:24:35 -08:00
Andrew Waterman
15dc2d8c40
add fp writeback arbitration logic
2012-02-14 00:32:25 -08:00
Andrew Waterman
6c2d8a37ae
remove a partial update that makes chisel barf
...
chisel regards it as a combinational loop, even though it isn't.
2012-02-13 16:45:29 -08:00
Andrew Waterman
b5a19a54a3
add fcvt.[s|d].[w|l][u]
2012-02-13 02:01:26 -08:00
Andrew Waterman
a4a9d2312c
add fcvt.[w|l][u].[s|d], f[eq|lt|le].[s|d]
2012-02-13 01:30:01 -08:00
Andrew Waterman
069037ff3a
add FP recoding
2012-02-12 23:31:50 -08:00
Andrew Waterman
08b6517a23
add FP ops mftx, mxtf, mtfsr, mffsr
2012-02-12 20:12:53 -08:00
Andrew Waterman
9bb1558a34
WIP on FPU
2012-02-12 04:36:01 -08:00
Andrew Waterman
50a283d311
move store data generation into EX stage
...
doing so removes it from the critical path of FP store unrecoding.
2012-02-12 01:35:55 -08:00
Andrew Waterman
725190d0ee
update to new chisel
2012-02-11 17:20:33 -08:00
Andrew Waterman
990e3a1b34
fix fpu port direction bug
2012-02-08 15:19:26 -08:00
Andrew Waterman
d471a8b2da
arbitrate for LLFU writebacks in MEM stage
2012-02-08 04:21:05 -08:00
Andrew Waterman
5403d069e9
add fp loads/stores
2012-02-07 23:54:25 -08:00
