riscv/rocket-chip
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Author SHA1 Message Date
Scott Beamer
3b48d8569c [commitlog] don't print out writebacks to x0 2015-09-15 16:47:26 -07:00
Christopher Celio
e22bf02a80 [commitlog] CSR's cycle optionally set to instret 
- Allows debugging Rocket against Spike by having timer interrupts
    occur in the same place in the instruction stream for both.
 2015-09-15 16:47:26 -07:00
Christopher Celio
7d14abf262 [commitlog] Added privilege-level to output 2015-09-15 16:47:24 -07:00
Christopher Celio
53a02a62c8 [commitlog] Fix sp/dp bug in FPU writeback 2015-09-15 16:46:47 -07:00
Christopher Celio
d630a03857 [commitlog] Added FP instructions to the commitlog 2015-09-15 15:59:13 -07:00
Christopher Celio
91458bef1c [commitlog] Initial commit log for integer working 2015-09-15 15:59:03 -07:00
Christopher Celio
754c47bdd1 Removed "make debug" test from travis 
- currently causes gcc4.8 to crash
  - likely due to high memory requirements in compiling generated c++
    code for debug/vcd output
 2015-09-14 15:45:50 -07:00
Colin Schmidt
d355d81633 regression script bump for new torture that can produce waveforms 2015-09-14 13:00:54 -07:00
Howard Mao
bd536d8832 make HTIFModuleIO an anonymous bundle 2015-09-14 12:58:44 -07:00
Howard Mao
9d89d2a558 get rid of MemIO -> TileLink converters 2015-09-14 12:58:44 -07:00
Howard Mao
f9965648f2 fix up some things in tilelink.scala 2015-09-14 12:57:54 -07:00
Howard Mao
64717706a9 get rid of non-NASTI RTC module 2015-09-14 12:57:54 -07:00
Howard Mao
6ee6ea4f1e use Put/Get/PutBlock/GetBlock constructors in broadcast hub 2015-09-14 12:57:54 -07:00
Howard Mao
ae3d96013a make TL -> NASTI converter ingest ClientUncachedTileLinkIO and move functionality to Unwrapper 2015-09-14 12:57:54 -07:00
Howard Mao
21f96f382c split off SCR functionality from HTIF 2015-09-14 12:57:54 -07:00
Howard Mao
bdc6972a8d separate RTC updates from HTIF 2015-09-14 12:56:44 -07:00
Howard Mao
24f3fac90a fix broadcast hub and TL -> NASTI converter to support subblock operations 2015-09-14 12:56:44 -07:00
Scott Beamer
3eed7ff238 make float_fix more conservative with replacement 2015-09-12 11:00:00 -07:00
Scott Beamer
a12cd13190 tool to unrecode single floats from commit logs 2015-09-11 20:19:18 -07:00
Christopher Celio
c2344ee2bc Added generated-src-debug to make clean target 2015-09-11 19:07:33 -07:00
Christopher Celio
c9d89226fb Generated *.d file of tests now kept in order 
-Changed Set to LinkedHashSet in Testing.scala
 2015-09-11 18:36:04 -07:00
Christopher Celio
c8a7deb950 Added a commitlog post-processor for Rocket 
- Useful for taking Rocket's out-of-order writebacks and generating an
    in-order commit log.
  - Resulting commit log can be diffed against Spike's commit log.
 2015-09-11 16:06:01 -07:00
Andrew Waterman
78b2e947de Chisel3 compatibility fixes 2015-09-11 15:43:07 -07:00
Andrew Waterman
24389a5257 Chisel3 compatibility fixes 2015-09-11 15:41:39 -07:00
Howard Mao
4c3c3c630e add assertions to make sure NASTI -> MemIO converter takes in requests of the right size and len 2015-09-10 17:55:10 -07:00
Christopher Celio
17e971bbfa Add emulator "make debug" and "-j" to travis 2015-09-10 17:34:16 -07:00
Howard Mao
6387d31c62 add comments and small fixes for NASTI and SMI 2015-09-10 17:33:48 -07:00
Howard Mao
8a8d52da4f add convenient constructors for NASTI channels 2015-09-10 17:33:31 -07:00
Christopher Celio
d9a2162472 Bump Chisel 2015-09-10 17:26:41 -07:00
Christopher Celio
8f71c4da2d Reintroduced multiple emulator backend directories 
Fixes a "make -j" concurrency bug due to deleting files that another
  parallel rule depends on.
 2015-09-10 17:14:23 -07:00
Christopher Celio
83df4bcc35 Fixed run-bmark-tests make target in vsim 2015-09-09 22:37:47 -07:00
Colin Schmidt
af7336ef8b blacklist private branches from travis 2015-09-08 15:13:38 -07:00
Colin Schmidt
d292b6cb13 don't connect rocc-fpu-port without rocc accel 2015-09-08 14:44:12 -07:00
Andrew Waterman
d08b75c472 Merge pull request #15 from ucb-bar/fix_disasm_garbage 
If you don't have spike-disasm in your path, your path is dumped
 2015-09-03 17:55:31 -07:00
Ben Keller
8e9c15c10d If you don't have spike-disasm in your path, your path is dumped 
to stdout by this line every time you do anything in the entire repo.
 2015-09-03 15:36:11 -07:00
Christopher Celio
e6b6ff5a1d Update README.md 
Corrected PublicConfigs.scala -> Configs.scala
 2015-09-02 22:55:53 -07:00
Howard Mao
ede1ada053 Add converters and utilities for simpler peripheral interface (SMI) 2015-09-01 14:00:45 -07:00
Howard Mao
75ec7529af implement NASTI Interconnect generating from configuration address map 2015-09-01 14:00:45 -07:00
Howard Mao
b046c57284 make NASTI -> MemIO converter compliant to AXI4 spec 2015-09-01 11:17:38 -07:00
Colin Schmidt
1bfd873888 bump chisel version for seqmem setname 2015-08-29 12:53:57 -07:00
Andrew Waterman
350d530766 Use Vec.fill, not Vec.apply, for Vec literals 2015-08-27 10:00:43 -07:00
Andrew Waterman
94287fed90 Avoid type-unsafe assignments 2015-08-27 09:57:36 -07:00
Andrew Waterman
05d311c517 Use Vec.apply, not Vec.fill, for type nodes 2015-08-27 09:47:02 -07:00
Andrew Waterman
f7d9628de2 Avoid needless use of Vec 2015-08-27 09:40:52 -07:00
Andrew Waterman
3a1dad7994 Use Vec.apply, not Vec.fill, for type nodes 2015-08-27 09:40:24 -07:00
Iori YONEJI
0ac6172525 Add "-memsize" flag to emulator 
- Allow user to set memory size (in MiB) used by emulator.
   - if memory is exhausted, warn user about memory shortage.

Close #3
 2015-08-26 17:53:37 -07:00
Christopher Celio
b55765f597 Bump riscv-tools 2015-08-26 16:08:45 -07:00
Christopher Celio
b1e845f370 Add space to README.md 2015-08-26 14:34:22 -07:00
Scott Beamer
b88c283b21 add travis support and tests 2015-08-25 13:29:20 -07:00
Scott Beamer
333c594d2a respect environment's CXX 2015-08-25 13:26:14 -07:00