Commit Graph

16 Commits

Author SHA1 Message Date
9e0332e2b7 ALU: Connect VCC/GND pins and add 3V3 regulator
* Use pad on back side as ground pad
* Add labels for JTAG pins
* Add board edge cut
* Fix routing
2018-06-21 16:54:57 +02:00
e1a3ab745c Ad test bench for the computer control logic 2018-05-31 22:31:15 +02:00
611e0ac388 Add ALU pcb design, including custom footprint and schematic component for cpld 2018-05-31 21:14:05 +02:00
825a0954de Add schematic for generating multiple enabled clocks 2018-05-17 21:09:04 +02:00
6427812bb7 initial alu board 2018-05-17 16:29:50 +02:00
Max Braungardt
c1e2d4f4e1 Add more overflow ADD and SUB tests 2018-04-26 20:10:36 +02:00
Max Braungardt
a1bebb977e Fix INC and DEC by specifying if alu is the first one
If it is not the first, only increment or decrement when carry or
borrow is set.
2018-04-26 20:09:04 +02:00
Max Braungardt
fdedf7b657 Add tests for INC and DEC 2018-04-26 20:08:16 +02:00
4f3b29892a Add .gitignore 2018-03-09 03:50:16 +01:00
091884bab2 Add toy alu with initial testbench 2018-03-09 01:52:19 +01:00
116d97f508 Dadd GND planes to pc boards 2018-03-09 01:52:08 +01:00
1e46a456df Add one- and double-sided pc board 2018-03-09 01:51:41 +01:00
34d4e6c4ce Import register board 2018-03-09 01:51:41 +01:00
bd47c5633f Import led8 board 2018-03-09 01:51:40 +01:00
7cbc757b1a Autoroute mux12 board 2018-03-09 01:51:39 +01:00
a5cb833b1d Import unrouted mux12 board 2018-03-09 01:51:39 +01:00