51c42083d0
Add new junctions repo as submodule (contains externally facing buses and peripherals).
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Bump all submodules.
2015-07-29 18:15:45 -07:00
bd4ff35a4b
Upgrade sbt to 0.13.8, simplify build.scala Tasks, generate tests from TestGenerator App, set addons with env variable ROCKETCHIP_ADDONS
2015-07-22 11:49:10 -07:00
09e29e8fe0
add zscale
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only supports generating Verilog, which plugs into the fpga-spartan6 repository, for now
2015-07-07 20:38:47 -07:00
d3ccec1044
Massive update containing several months of changes from the now-defunct private chip repo.
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* Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API.
* Additional tests.
* New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit
* Updated TileLink protocol, NASTI protocol SHIMs.
* Lays groundwork for multiple top-level memory channels, superscalar fetch.
* Bump all submodules.
2015-07-02 14:43:30 -07:00
fefa560017
Change addons subproject to use .addons-dont-touch directory instead of addons
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This hides the directory name under standard invocations of ls and thus avoids confusing the user with extra directory names.
2014-09-25 06:46:06 -07:00
69d765744c
Adjustments to the build structure (see below)
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All 'addon' subprojects now have their sources aggregated into the addons subproject. This is done via a source copy (so that sbt will only rebuild sources that actually changed). To prevent caching issues the addons/src directory is CLEARED and then refilled every time addons is compiled. Thus, it is CRUCIAL NO SOURCES ARE MANUALLY ADDED TO addons/src AS THEY WILL BE WIPED BY addons/prepare. Due to sbt source caching, sbt will still be able to tell which sources have changed. (Strangely, sbt would not cache sources in extra unmanaged source directories and thus would always recompile them.) Also, cleaned up project/build.scala a bit to remove some warnings: Added import scala.language/postFixOps (so make! at the bottom no longer errors) and .toURI.toURL (as straight .toURL has been deprecated by the java standard library).
2014-09-25 06:45:21 -07:00
3b9624277a
normalize rocket-chip to reference-chip
2014-09-25 06:45:09 -07:00
2367b7beb5
Added logic to sbt so that, for rocketchip, it will automatically include src/main/scala sources from subdirectories into the rocketchip top-level project not already handled by formal subprojects
2014-09-12 01:08:11 -07:00
2c33852c52
final touches
2014-09-12 00:19:29 -07:00
c03c09ec31
update for rocket-chip release
2014-08-31 20:26:55 -07:00
e4b56b5d0e
generate verilog for rekall
2014-03-15 15:31:04 -07:00
5128298e8a
allow chisel to elaborate Modules outside of the ReferenceChip package
2014-02-05 03:29:23 -08:00
e50c5180cd
Merge branch 'master' into hwacha
2013-11-14 16:03:55 -08:00
c137cf1a46
Added line to fix race condition in sbt compile; fixed .gitignores
2013-11-08 15:30:08 -08:00
7da65434ee
Initial commit for the hwacha reference-chip/rocket re-integration.
2013-10-30 20:44:02 -07:00
3c1d1f7981
Fix(?) SBT race by defining subproject build order
2013-10-29 13:27:36 -07:00
fc9c676fc1
add chisel and hardfloat back as sub-projects, bump other sub-projects
2013-09-26 12:01:46 -07:00
69daae0dae
Add dependency resolvers to build.scala to fix build script
2013-09-05 14:56:41 -07:00
b06d33da2f
Canonicalized sbt, updated makefiles, cleaned up submodules, minor bugfixes
2013-08-19 19:54:41 -07:00
4d916b56e3
Bump scala to 2.10.2, sbt to 0.13-RC2, including new launcher. Upgrade reflection in network.scala to 2.10 lib. Constants now obtained from subproject package objects. Give network its own file.
2013-07-24 23:28:43 -07:00
7330deb13a
print stack trace if elaboration fails
2012-11-20 05:39:48 -08:00
7bcf59a18f
support continous compilation via "make test"
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for c++ emulator only, for now
2012-11-17 19:58:18 -08:00
538b23c223
Initial version of using sbt tasks to elaborate chisel source and invoke backends' makefiles
2012-10-23 12:52:59 -07:00
17d2bd8926
Initial version of sbt tasks (elaborate task with no parameters)
2012-10-23 12:52:00 -07:00
24a49350cc
reference chip design
2012-10-09 13:05:56 -07:00
93a0182b96
everything to get emulator working
2012-10-01 19:30:11 -07:00
