1
0
Commit Graph

3910 Commits

Author SHA1 Message Date
Yunsup Lee
5642194834 push hwacha to consistent state 2013-11-20 16:44:33 -08:00
Yunsup Lee
056bb156ca make CacheConstants an object 2013-11-20 16:43:55 -08:00
Stephen Twigg
3eafbbd1e2 Push hwacha, rocket. All physical tests pass. 2013-11-19 22:16:27 -08:00
Quan Nguyen
3b109763ad Connect FMA to Hwacha pipes 2013-11-19 20:54:47 -08:00
Yunsup Lee
8304a47919 Merge branch 'hwacha' of github.com:ucb-bar/reference-chip into hwacha 2013-11-19 18:02:13 -08:00
Yunsup Lee
c06299c963 push tests 2013-11-19 18:01:59 -08:00
Stephen Twigg
d7c6824c51 Push riscv-tests and riscv-tools 2013-11-18 13:30:02 -08:00
Stephen Twigg
e50c5180cd Merge branch 'master' into hwacha 2013-11-14 16:03:55 -08:00
Stephen Twigg
a662e85f2a Merge branch 'master' into hwacha 2013-11-14 16:02:44 -08:00
Stephen Twigg
36e715a797 Use newer version of hwacha (still not quite working but no longer stalls) 2013-11-14 15:56:51 -08:00
Stephen Twigg
a870f51300 Add some vector tests 2013-11-14 15:56:25 -08:00
Ben Keller
c137cf1a46 Added line to fix race condition in sbt compile; fixed .gitignores 2013-11-08 15:30:08 -08:00
Yunsup Lee
bb64c90092 forgot to put htif into uncore package 2013-11-07 15:42:21 -08:00
Yunsup Lee
f13d76628b forgot to put htif into uncore package 2013-11-07 15:42:10 -08:00
Yunsup Lee
c1966e2b0a forgot to put htif into uncore package 2013-11-07 15:42:03 -08:00
Yunsup Lee
1d6d4b4e96 move htif to uncore 2013-11-07 13:19:19 -08:00
Yunsup Lee
c350cbd6ea move htif to uncore 2013-11-07 13:19:04 -08:00
Yunsup Lee
da033af0b0 move htif to uncore 2013-11-07 13:18:46 -08:00
Yunsup Lee
ad1d8f219e push riscv-tools 2013-11-05 21:10:49 -08:00
Yunsup Lee
c810847761 hookup all memory ports 2013-11-05 17:12:25 -08:00
Yunsup Lee
4c56323f6f hookup all memory ports 2013-11-05 17:12:09 -08:00
Stephen Twigg
3cdfde9861 Push hwacha, rocket 2013-11-05 15:31:59 -08:00
Stephen Twigg
eae571e371 Remove rocc memory simplifye module (Hwacha has its own) 2013-11-05 15:31:03 -08:00
Stephen Twigg
7da65434ee Initial commit for the hwacha reference-chip/rocket re-integration. 2013-10-30 20:44:02 -07:00
Yunsup Lee
04108270ff push riscv-tools 2013-10-29 22:54:00 -07:00
Andrew Waterman
a875233be6 update subrepos 2013-10-29 21:17:07 -07:00
Andrew Waterman
3c1d1f7981 Fix(?) SBT race by defining subproject build order 2013-10-29 13:27:36 -07:00
Andrew Waterman
8c380a7c3a Abort "make run" when tests fail 2013-10-29 13:25:57 -07:00
Andrew Waterman
c55eee7244 Pass target machine exit code back to host OS 2013-10-29 13:24:09 -07:00
Andrew Waterman
12f0369e6e Simplify divide early out circuitry 2013-10-29 13:20:40 -07:00
Andrew Waterman
b44dafbdca Simplify branch offset mux 2013-10-29 13:20:40 -07:00
Andrew Waterman
23f7bab4f3 Reduce FMA pipeline depths
FMA QoR has improved enough to allow this change.
2013-10-29 13:20:40 -07:00
Yunsup Lee
f440df5338 rename M_FENCE to M_NOP 2013-10-28 22:37:41 -07:00
Yunsup Lee
1583560757 fix replay bug, don't respond when cmd is a NOP 2013-10-28 22:35:18 -07:00
Stephen Twigg
437f7ed4af Push hardfloat (ignore target files) 2013-09-26 20:51:19 -07:00
Henry Cook
fc9c676fc1 add chisel and hardfloat back as sub-projects, bump other sub-projects 2013-09-26 12:01:46 -07:00
Henry Cook
42693d43ad simplify build.sbt 2013-09-26 09:51:14 -07:00
Stephen Twigg
f6d7e22c46 Push rocket (fix issue with uppermost bit of D$ req tag getting lost) 2013-09-25 11:52:01 -07:00
Stephen Twigg
36b85b8ee2 Fix issue where the MSB of D$ req tag was getting lost for all agents when an accelerator was attached. 2013-09-25 11:51:10 -07:00
Stephen Twigg
36dfff5ee8 Adjust Verilog testbench to use new debug_stats_pcr signal that has been exported to the top level. It is the or-reduction of the stats pcr for each core. Push rocket (export stats pcr to top level). This scheme is cleaner than digging into the hierarchy. 2013-09-25 01:21:41 -07:00
Stephen Twigg
891e459625 Export stats pcr register (#28 currently) to the top-level 2013-09-25 01:16:32 -07:00
Stephen Twigg
eb7e6f03b3 push rocket (AccumulatorExample fixes and documentation) 2013-09-24 16:33:32 -07:00
Stephen Twigg
730a6ec76b AccumulatorExample now properly sets its busy bit. Also, pepper some helpful comments into AccumulatorExample 2013-09-24 16:32:49 -07:00
Stephen Twigg
472b947fbe push rocket (add option to RocketConfiguration, vm, to turn off virtualk memory) 2013-09-24 16:16:12 -07:00
Stephen Twigg
eb03f61058 Properly ignore target files. Push uncore (properly ignore target files) 2013-09-24 16:03:28 -07:00
Stephen Twigg
20246b373e Properly ignore target files 2013-09-24 16:02:00 -07:00
Andrew Waterman
81c752de84 Support disabling virtual memory 2013-09-24 13:58:47 -07:00
Andrew Waterman
adc386f889 Turn off virtual memory inside RoCC base class 2013-09-24 13:58:47 -07:00
Stephen Twigg
081fcc4e63 push rocket (accelerator interface fixes) 2013-09-24 10:55:22 -07:00
Stephen Twigg
3532ae0b79 From Andrew, actually mark scoreboard when rocc instruction with a writeback is issued. Also, fix an issue with AccumulatorExample not properly tagging its memory requests. Finally, reverted changes from f27429c to more properly follow the spike model (always return previous value of accumulator). 2013-09-24 10:54:09 -07:00